Intel drags Xeon Phi Knights Hill chips out back... two shots heard
Chipzilla goes back to the drawing board on many-core math accelerator line
Posted in HPC, 16th November 2017 07:38 GMT
Updated Intel has scrapped Knights Hill, an upcoming addition to its high-end many-core Xeon Phi chip family, and will go back to the drawing board for its microarchitecture.
We heard at the end of last month that the Xeon Phi gang was, in the words of one well-placed semiconductor industry source, "not long for this world," which we noted at the time. Now, this week, Chipzilla has officially put the bullet in Knights Hill, which was due to launch this year but went AWOL, and will embark on a serious rethink of the Xeon Phi line's internal designs.
Knights Hill was supposed to power the US government's 180-PFLOPS Aurora supercomputer, which was due to go live in 2018, and is being built by Cray and Intel. However, that deadline has been pushed back to 2021 by Uncle Sam, giving Chipzilla time to rework its processors to bring Aurora up to 1,000 PFLOPs of performance, or a quintillion math calculations per second.
Given that Knights Hill was supposed to be a 10nm part, and that process node is nothing short of a fiasco at the moment for Intel, we can totally see why Chipzilla would jump at the chance to push back shipments of the silicon and have a crack at trying to hit one exaflops or more with Cray. We imagine the US government realized the chips were going to be late, and thus rewrote the supply contract to up the required performance of Aurora to the exascale line, and told Intel and Cray they have four years to make it happen.
To recap the Xeon Phi line: it's not for your common or garden server, workstation or desktop. It's aimed at supercomputer gear with machine code instructions to dash through operations on matrices and other blobs of data at high speed in parallel. Each chip sports up to 72 cores and 288 hardware threads, can hit up to 3,456 GFLOPS of double-precision math performance, and costs as much as $3,368 apiece, depending on the model you pick. It was spawned from the Larrabee microarchitecture, Intel's crashed attempt to mash GPU number-crunching technology into an x86 CPU, and emerged around 2010.
Intel talks concurrency and Knights LandingREAD MORE
In 2012, a Xeon Phi series codenamed Knights Corner arrived, and were installed in various big beasts as coprocessors: host CPUs running boffins' scientific software would offload calculations to the Phi accelerators to perform at high speed. The Knights Corner cores were x86 compatible and based on the original Pentium designs. Then, in 2016, came Knights Landing Xeon Phis that didn't need a host CPU: they could run an operating system and program code all by themselves, with an emphasis on SIMD operations, on Airmont Atom cores.
Another follow up, Knights Hill, was due to land this year, and has now been canceled. That leaves the also upcoming Knights Mill Xeon Phi in jeopardy: this was supposed to be focused on running machine-learning software at speed. It's not clear if this will also be dumped along with Knights Hill.
"One step we’re taking is to replace one of the future Intel Xeon Phi processors (code name Knights Hill) with a new platform and new microarchitecture specifically designed for exascale," Intel's Trish Damkroger, a data center group veep, said. "Combined with our comprehensive HPC solutions portfolio spanning compute, storage, I/O, and software, the updated roadmap is well poised to energize the exascale revolution."
Speaking to The Register's sister publication The Next Platform, Intel enterprise and HPC group boss Barry Davis said the Xeon Phi remake would involve changes within the chips, and would not radically change the surrounding hardware and software running on top. The redesigned silicon is expected to be x86 compatible.
"Since we are on a CPU path here, this is not going to be a strategy that completely disrupts the ecosystem," Davis said.
"From an Intel perspective, this is a moonshot — this is a big deal. Working without partners to create one of the first exascale platforms in the world is a big challenge. I’m not sure Intel has specific challenges other than we do a lot as a company and the one way to address is to give this importance internally. We address the challenges that are present here daily anywhere in terms of CPU design and packaging and systems — this will exercise all of our muscles.
"We need to execute this well is the point. We have enough time, this isn’t next year, there’s a few years to figure out what needs to be done and we do that by partnering with the ecosystem and [US government] and work together."
Essentially, Intel is thrashing around, trying anything to destroy its rival Nvidia – which ships GPUs as accelerators for supercomputers and other high-performance machines, and thus is preventing dollars flowing into Intel's bank accounts.
Unfortunately, the Xeon Phi just didn't catch on in a way Intel would have liked – it could be tricky to program that many cores efficiently; its AVX-512 implementation was not fully compatible with that in other Xeon CPUs; it was restricted to niche HPC projects; the architecture was not going to scale to 1,000 PFLOPS; 10nm was a hot mess; and so on. Now the future of the chip family is uncertain.
Back in 2010, Intel abandoned producing discrete graphics chips for big beasts, leading to the Xeon Phi's genesis as a coprocessor offering. Now Intel's working on discrete GPUs with AMD, and rethinking the Phi. How the world changes. ®
Updated to add
Our friends at Heise overheard at this year's Supercomputing Conference – held in Colorado, US, earlier this week – that the Xeon Phi line will be succeeded by a family of chips codenamed Knights Cove. These will have 38 or 44 cores each, 32GB of integrated HBM2 memory, and will be based on Ice Lake Scalable Xeons due to arrive in 2019 or 2020. The 44-core part may well be two 22-core chips combined.
Knights Cove will be succeeded by chips codenamed Ice Age and Knights Run, which are understood to be the processors that will go into the one-exaflops Aurora machine, fingers crossed.
Also, the Phi's chief architect Avinash Sodani left for Cavium in September 2016, fueling rumors Intel laid off the Knights team last year, sealing the chip family's fate. AMD's GPU supremo Raja Koduri jumped ship to Intel this month, again suggesting the direction of Chipzilla's coprocessors.
PS: China is pulling ahead of America in the list of the world's top 500 publicly disclosed supercomputers. And every single machine on that list runs GNU/Linux – even the esoteric IBM Blue Gene/Q on its login and IO nodes.