Get your royalty-free soft-core OpenPOWER processor core blueprints here. Extra, extra – read all about it

Plus: Intel slips first 10nm Agilex FPGAs to select lucky customers

Here are a couple of chip-related news bytes for you.

An IBM engineer has released the first soft-core implementation of an OpenPOWER CPU since Big Blue's decision to open up the specification, and Intel says it is "shipping" its first 10nm Agilex FPGAs.

Watt the heck?

Earlier this month, IBM announced it will follow in the footsteps of the RISC-V gang and open up the specifications of its OpenPOWER instruction set architecture.

That move will allow people to design their own OpenPOWER-compatible microprocessors at no cost: no royalties or license fees need to be paid to IBM nor the OpenPOWER Foundation, the latter of which is moving into the Linux Foundation. The grand plan is to encourage designers to implement OpenPOWER CPU cores in their future chips, and give the ecosystem some extra love.

carbon_nanotube_microprocessor

A carbon-nanotube RISC-V CPU blinks into life. Boffins hold their breath awaiting first sign of life... 'Hello world!'

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As part of that announcement, IBM promised a soft-core implementation of an OpenPOWER processor would be released, allowing folks to configure an FPGA to act as an OpenPOWER device, evaluate the architecture, and possibly improve it. Think of this implementation as a reference or starting guide to crafting your own OpenPOWER CPU.

Well, true to its word, the soft-core implementation, dubbed Microwatt, is now available from GitHub, and was developed by IBM distinguished engineer Anton Blanchard. The repo contains the necessary VHDL 2008 code describing the circuitry needed to create the processor core, and instructions on how to build and simulate it to run Python natively on the soft-hardware. You should also be able to configure an FPGA to run it direct, or drop it into your ASIC blueprints if you wish.

The license is interesting: it's Creative Commons, with a twist:

© IBM Corp. 2019. This softcore is licensed under and subject to the terms of the CC-BY 4.0 license (https://creativecommons.org/licenses/by/4.0/legalcode). Additional rights, including the right to physically implement a softcore that is compliant with the required sections of the Power ISA Specification, will be available at no cost via the OpenPOWER Foundation. This README will be updated with additional information when OpenPOWER's license is available.

This suggests a formal license is still forthcoming. For now, you need permission from the OpenPOWER Foundation if you want to slot this into a physical microprocessor or ASIC. And if you use the technology in any way, as is or modified, you have to identify IBM as the creator along with their copyright notice.

As for the VHDL code, it is, in our opinion, readable and clean, and a wonderful guide through the design of a modern processor core. From instruction fetching and decoding to math and memory load and store, the blueprints are all there to review. It is not complete, and there are features on the todo list, including caches and a supervisor mode.

Microwatt will now takes its seat alongside open-source RISC-V CPUs, and other open cores.

Chipzilla 'ships' another 10nm product

Intel says it is shipping its first 10nm Agilex FPGAs, albeit it to selected customers: these so-called early access outfits include Microsoft, Colorado Engineering, Mantaro Networks, and Silicom. These appear to be the reconfigurable hardware components teased in April this year.

The x86 giant claims Agilex, code named Falcon Mesa [PDF], has 40 per cent higher performance than Altera’s Stratix 10 family of FPGAs, or 40 per cent less power consumption; Intel bought Altera in 2015.

It also marks the availability, albeit in limited form, of another 10nm product from Intel after years and years of delays. ®

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