A carbon-nanotube RISC-V CPU blinks into life. Boffins hold their breath awaiting first sign of life... 'Hello world!'

MIT, Analog get into some RISC-y business

carbon_nanotube_microprocessor
RV16XNano carbon nanotube processor. Image credit: Felice Frankel.

“Hello, World! I am RV16XNano, made from CNTs.” That’s the friendly message emitted by a RISC-V-based chip made entirely out of carbon nanotubes (CNT) and revealed on Wednesday.

More than 10,000,000 CNTs were used to form 14,702 CMOS carbon-nanotube field-effect transistors (CNTFETs), arranged in 3,762 digital logic blocks, that together operated as a 16-bit microcontroller-grade CPU – specifically, an RV16XNano – at 1.8V. The core can fetch 32-bit instructions from memory, has the usual RISC-V register file, and can read and write 16-bit data from and to RAM. That's an improvement over, say, the carbon-nanotube microprocessor built in 2013 that only had 178 CNTFETs.

A group of engineers at MIT and Analog Devices, a semiconductor manufacturing company, all based on the US East Coast, built this latest chip to show off their new techniques in crafting carbon nanotube processors with fewer defects using standard industry tools and processes.

“This is by far the most advanced chip made from any emerging nanotechnology that is promising for high-performance and energy-efficient computing,” said Max Shulaker, an assistant professor of electrical engineering and computer science at MIT, who was involved in the component's production.

“There are limits to silicon. If we want to continue to have gains in computing, carbon nanotubes represent one of the most promising ways to overcome those limits," he said, adding the manufacturing procedure "completely reinvents how we build chips with carbon nanotubes.”

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The name of the game was to create a CNT-based processor using mostly industry-standard practices, presumably to demonstrate it is possible to build one without loads of custom and expensive factory machinery.

We're told this chip was fabricated from a standard 150mm-diameter silicon wafer. It was treated with a liquid solution that helped bind millions of carbon nanotubes onto what MIT described as "predesigned transistor architectures" present on the wafer surface. A polymer and solvent were used to wash away excess material, leaving single CNTs on the surface. The eggheads then used a process called MIXED, aka metal interface engineering crossed with electrostatic doping, to transform each CNTFET into an N or P type as required by the circuit blueprints.

So, gently put, the wafer was prepared, and its transistors laid out, using standard design tools and assembly line gear, and then CNTs were deposited on the surface, and the resulting transistor gates assigned a type, to form the digital circuitry making up the CPU core. The process is described in greater detail in a paper published in Nature this week.

Carbon nanotubes are tricky to work with. Sometimes the structure of the carbon atoms results in structures that have unwanted metallic properties, such as high conductance. This can lead to current leakage and faulty chip operation, which you don't want in a processor. They often tend to bundle together, too, creating dense areas with additional side effects. On the plus side, they require less energy and can operate faster than traditional silicon FETs, it is claimed.

The team are now working with a silicon-chip foundry to implement their manufacturing techniques on a wider scale. They hope that carbon nanotube chips will be commercialized one day. “We think it’s no longer a question of if, but when,” Shulaker said.

Meanwhile, for the uninitiated, RISC-V is an open-source instruction set architecture that defines how software and processor CPU cores talk to each other to get work done. It is helping spur fresh enthusiasm in open hardware. ®

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