Arm doodles server, comms CPUs in public before they leak out in open-source code...

Data center blueprints get Neoverse brand, roadmap

Local storage servers. Photo by Shutterstock

Japanese chip designer Arm has lightly sketched out in public its future processor designs that are aimed at powering internet servers and infrastructure.

Think CPU cores, chip interconnects, memory subsystems, and so on, for semiconductor manufacturers to use in silicon brains for data center systems, edge devices, and networking and telecommunications gear. Arm really wants to nuzzle its way into server and telecoms racks, tiptoeing past Intel Xeons and AMD Epycs, and so here's the intellectual property it hopes will do the trick.

And we're not joking when we're say lightly sketched: the biz has only shown off a roadmap of codenames and process nodes. Arm is going public with these plans partly because source code supporting these future chip designs will soon be trickling into the Linux kernel and other open-source projects referencing said codenames, so it may as well spill some beans now to head off speculation.

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Right now, Arm has its 16nm Cosmos platform, which includes the Cortex-A72 and A75 CPU cores. We're told infrastructure hardware using this platform is being used in production right now.

Come 2019, and Arm hopes to launch the 7nm Ares platform, then the 7nm+ Zeus platform in 2020, and the 5nm Poseidon platform in 2021. These are all designs by Arm that will be licensed to chipmakers for powering backend infrastructure servers and related hardware. A roadmap out to 2021 is important: Arm wants to demonstrate to its customers and its customers' customers that it has a long bench of blueprints they can rely on. It wants them to feel confident they are committing to a stable family of products when they decide to design, build, and power up a data center based on Arm-compatible chips.

Its techies expect networking, storage, and security equipment that opt to use this upcoming technology to sport 16 to 24 Arm CPU cores with 16MB+ of system cache. Edge compute boxes may use 32-core CPUs with 32MB of system cache, and cloud compute machines may use 48, 64 or 96-core CPUs per socket with 64MB of system cache. Those cloud compute processors, at least, will compete against AMD Epyc, Intel Xeon, Cavium ThunderX2, and Ampere eMAG rivals. Oh yeah, and IBM POWER, and whatever RISC-V is up to by 2021.

All this data-center-grade tech will be branded Arm Neoverse. Arm's device CPU cores will retain the usual Cortex brand. In effect, Arm is forking its top-end Cortex-A line, aimed at smartphones and laptops, and ramping them up for server-grade chips under the name Neoverse.

In a statement on Monday night, a spokesperson told El Reg:

We have designed a scalable set of IP that enables a range of computing solutions [as listed above]. The power efficiency of Arm-based designs enables the high core counts in different power budgets.

Our partners are building designs using a range of our IP and/or custom components based on the Arm architecture. Several platforms based on the Cortex-A72 are in production now, with more on the way based on that platform and newer platforms. We anticipate “Ares” systems will be in silicon in 2019, and we will enable partners to bring Zeus and Poseidon based systems into first silicon in 2020 and 2021, though exact schedules are specific to each partner.

Today marks the start of the Arm TechCon conference in San Jose, California, USA. We'll let you know if anything interesting pops up from the event. Meanwhile, you can read more analysis on Neoverse, here, on our sister site, The Next Platform. ®

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