Great, IBM has had a PCM breakthrough. Who exactly is going to manufacture?

Pick a partner

PCM IBM chip, photo IBM
IBM's TLC PCM chip

Analysis IBM has demonstrated a 3-bit Phase-Change Memory chip with IBM Zurich researcher Dr. Haris Pozidis talking about it in a YouTube video and not mentioning 3D XPoint once.

The idea is to counter the relatively high cost of PCM chips by giving them 3 bits per cell, TLC or triple-level cells, instead of just one - clever.

This IBM TLC PCM occupies the same general space in the memory-storage hierarchy, defined by latency, as Intel/Micron's 3D Point. It is much faster than flash, IBM quoting 70 times faster, and not quite as fast as DRAM, with a 1 microsecond read latency. DRAM is generally around 0.1 microseconds, 100 ns.

We can slot this PCM into a latency table we used for XPoint:


Unlike its presentation of XPoint, IBM has provided some endurance numbers, saying it lasts for at least 1 million write cycles, which is far better than the 3,000 it quotes for TLC flash. The substance stores bits as differing resistance levels, with eight of them needed for the 3-bit values it stores. It has overcome a resistance drift problem by devising algorithms and signal processing techniques that it enable it to follow the resistance drift, as it were, and still read data.

IBM has previously attacked the resistance state drift problem through encircling the PCM cell with a pipe of a more stable material into which the resistance state of the PCM cell would be projected and retained. This TLC drift tracking method is better.

The chip is suggested for use with in-memory computing, like XPoint, and also mobile phones as an operating system boot resource.

All-in-all it is a convincing demonstration of a storage-class memory technology that could seemingly be productised - except that IBM has no chip manufacturing capability for PCM and no manufacturing partner. What are the possibilities?

SanDisk has a resistive RAM (ReRAM) initiative, with a partnership with HPE. However SanDisk has just been bought by WDC. Its HGST unit demonstrated a 3 million IOP PCM chip with a 1.5 microsecond read latency in August 2014.

No doubt it will be looking into TLC possibilities as well as evaluating the SanDisk ReRAM research.

Toshiba can be assumed to be up to speed with SanDisk's ReRAM technology; the two are flash foundry partners. But whether Toshiba, financially weakened through an accounting mess, wants to take on IBM PCM manufacturing and tangle with Intel and Micron's XPoint in the X86 server market is another matter. On the other hand it may well decide it needs a chip stake in the DRAM-NAND latency gap and IBM's PCM has to be a candidate.

Samsung, the big wheel in NAND manufacturing, may well be looking at the same gap and wondering how it is going to fill it. Both it and Toshiba have looked into STT-RAM but that doesn't seem promising. With XPoint chips set to appear as products inside 12-18 months, Samsung needs something.

The same goes for SK Hynix, the other foundry partner possibility for IBM. HPE's memristor technology still appears to be two or three years away from production and XPoint may kill it anyway, at least in the general X86 server market.

IBM could probably go knocking on the doors of SK Hynix, Samsung and Toshiba and sing songs about responding to XPoint and a 2-3 year productisation period. It ought to at least get a hearing.

Big Blue has demonstrated the idea of PCM chips hooked up to its POWER servers using its Coherent Accelerator Processor Interface (CAPI). This would give them storage-class memory and enable them to compete with XPoint-accelerated X86 servers.

We are on the cusp of a radical change in computing towards in-memory techniques and PCI-class speed, RDMA-connected storage arrays - phase changes indeed. ®

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