Look who's avoided getting chatty about XPoint again. Micron... let's get non-volatile

Into the third dimension, beyond DRAM and flash

Micron_16nm_NAND_wafer
Micron 16nm NAND wafer

Comment Micron entertained analysts at a briefing session and discussed 3D flash and 3D crosspoint (XPoint) memory technologies and plans.

Its operating priorities in 2016 for non-volatile memories are:

  • 3D NAND Gen 1 ramp and Gen 2 manufacturing enablement
  • Have total 3D flash be >50 per cent of NAND fab bit output by Fall 2016
  • 3D XPoint market enablement

The third dimension

Gen 1 3D NAND, with 32 layers, is coming from Micron’s FAB 10 in Singapore. It thinks its gen 1 3D NAND will have a 25 per cent lower cost than current 16nm planar (2D) NAND. TLC (3bits/cell) 3D NAND production will be prioritised over MLC (2bits/cell), with TLC output soaring past MLC in the first 2017 quarter.

Micron is looking at plans for second generation 3D NAND deployment, with generations three and four after that. It thinks second generation 3D NAND will have a 30 per cent lower cost than the first-generation stuff, with its FAB 10 producing gen 2 wafers this summer. It thinks its 32-layer 3D NAND’s cost structure is similar to Samsung’s 48-layer costs.

Micron_3D_NAND_TLC_MLC

Micron 2D NAND output and MLC/TLC split

Analyst haus Stifel Nicolaus' MD, Aaron Rakers, says Micron places the dies’ logic circuitry underneath the 32-layer floating gate architecture memory array, saying this helps produce more bits per wafer. Its competitors use a charge-trap architecture and Micron says it’s much hard to place CMOS logic circuits under the array in this design.

The company did not mention the number of layers in the gen 2 3D NAND technology. We remind ourselves that 3D NAND density can be increased in three ways:

  • increasing the number of layers from 32 to 48 and beyond
  • Decreasing the cell size
  • Adding a fourth bit to each cell (QLC)

The presentation talked about QLC flash but not in any firm way and we know that QLC flash will have a slower performance than TLC flash as well as lower endurance, suggesting that controller functionality has to be extended to counter these effects.

We would not be surprised if the gen 2 3D NAND from Micron featured a smaller cell size as well as or even instead of an increase in the number of layers.

Rakers writes that “Micron conceded that it missed the boat on TLC over the past couple years and the company intends to fix that going forward.”

XPoint

There is a multi-generational roadmap for 3D XPoint memory. The first generation is on its scheduled track for mass production.

Micron_Xpoint_outlook

In 2022 c4.4EB (4,400,000,000 GBs)of Xpoint will ship.

The chart shows 4.4 exabytes of XPoint will ship in 2022 in mainstream servers with almost half the 2- and 4-way X86 servers using it.

The XPoint roadmap is intended to deliver improvements in cost/bit, performance and density. This could come from a die size shrink and/or from an increase in the number of layers. Neither possibility appears on the slides, Micron keeping its XPoint specifics behind a tightly-wrapped kimono.

Future memory technologies

Beyond XPoint, current 20nm DRAM chip activities and planning for a sub-20nm DRAM (1Xnm - possibly 16-15nm, then 1Ynm and 1Znm with shrinks on one axis at a time), Micron is looking at two future memory technology areas.

New Memory A is in the DRAM, high-performance area with advances in retention, speed and endurance, suggesting its is a non-volatile memory.

New Memory B is a lower-cost memory in the NAND area, again thought to be non-volatile.

Memory application markets

It thinks that mobile devices will need storage class memory technology to optimise performance/power, and also 3D NAND to improve capacity, as well as 16nm planar flash.

In SSDs PCIe NVMe and SAS will dominate high-end workloads for server and storage. Next generation systems will enable drives greater than 1TB. Micron believes scale-out servers with SSDs are challenging traditional storage architectures with capacities moving rapidly past 2TB. In hyperscale deployments, SATA will be dominant as latency is valued over pure performance.

In the client area, SSDs are mainstream in ultra-portables for form-factor and power reasons, and SSD adoption continues to grow (~35 per cent in 2015) even with flat/down PC demand.

We should see 2TB consumer SSDs with 3D NAND in the second 2016 quarter and there will be 1TB single-sided M.2 format 3D NAND SSDs in the third quarter. For hyperscalers Micron expects to see 8TB or greater 3D NAND SSDs in the fourth 2016 quarter.

We’ll see 3D NAND SSDs for the enterprise in 2017’s first quarter which will have the highest performance and capacity across SAS and PCIe interfaces.

The majority of Micron’s Majority of NAND fab output will be 3D NAND in Fall 2016 (late September to late December).

Check out the Micron slides used at the event here (47-slide PDF). ®




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