Fan belts only exist, briefly, in the intervals between stars

Resistor dividers are useful!

Bigelow, at IAS, bit the bullet and used a level-based system of tube logic, where the only pulses were a set of overall synchronizing clocks.

He handled the level shifting problem with resistor dividers. Resistor dividers are very lossy, something anathema to designers of analog tube circuitry, but Bigelow realised that in digital circuitry, that runs between cutoff and saturation, losses up to a point are immaterial.

And by getting rid of capacitors, Bigelow got rid of fickle, fragile, critical pulses, and was able to build a reliable computer with parts that others had thrown away.

Bigelow also hit upon a solution to the second problem with level-based tube logic. To make a tube-based flip-flop one cross-couples two inverters (housed in a single 6J6) in what is known as the Eccles-Jordan circuit. It is a single bit set/reset memory.

If driven through capacitive coupling it can be made to toggle, usually, and with rather a bit more work using 6AL5 dual diodes (remember, this was before semiconductors) as pulse diverters, can be made into something that looks, more or less, like a D-type flip-flop we know of today.

The problem comes with that ‘usually’ and ‘more or less.’ Capacitively-coupled flip-flops are sensitive to noise and, critically so, to the shapes and durations of the pulses fed to them. Getting a 40-bit register (the IAS machine word was 40-bits wide) to behave properly in a capacitively-coupled system of logic was determined to be not practical.

So, Bigelow invented the master-slave set/reset flip-flop. So, picture two flip-flops, A and B, where the output of A feeds the input of B. Synchonising clock pulse 1 gates the logic preceding A into jamming long-settled data into A. After a settling interval synchronising clock pulse 2 gates the logic preceding B into jamming the settled output of A into B. After a settling interval, then, new data may be jammed into A, and so forth.

This makes for a very stable operation, as Dyson points out, but it has two drawbacks. First, a level-based system of logic requires twice as many 6J6s as does a pulse-based one, although, in recompense, far fewer 6AL5s.

Second, the use of set/reset flip-flops, rather than D-type flip-flops, means that every flip-flop must be fed with both true and complement data, otherwise a flip-flop will either be permanently set or permanently reset. That’s a lotta circuits!

But there is an out, something that Dyson does not mention in his book. Assume that only true data is available, without its complement, and start with the same two flip-flops, A and B, from above. Initially both A and B are cleared. Synchronising clock pulse 1 gates the logic preceding A into jamming true data into A. If the data is asserted A is set, otherwise it stays cleared.

After a settling interval synchronising clock pulse 2 clears B. After a settling interval clock pulse 3 gates the logic preceding B into jamming the settled true output of A into B. If the data is asserted B is set, otherwise it stays cleared. After a settling interval synchronising clock pulse 4 clears A. Rinse and repeat, forever.

One might try to get clever and try to "double up", to make one clock pulse do more than one thing. The problem with that is the case where B feeds back to A without an intervening flip-flop, resulting in a set/reset conflict.

Rather than driving oneself into the frantic dithers making sure this can never happen (hey, we’re talking tube-based logic circuitry here anyway, folks ...), it’s a more reasonable approach to use four synchronising clock pulses and keep jamming and clearing as separate operations.

Four clock phases, folks. Not 2 or 3. By using a non-complementary level-based system of logic one can make a reasonable compromise between performance and complexity. Note, by the way, that Texas Instruments’ TMS9900 minicomputer-on-a-chip used a 4-phase clock. So, effectively, did Motorola’s MC6809. And I suspect there’s a very good reason for that. Ecclesiastes was right: regardless of one’s system of logic, there is nothing new under the sun.

A joy of Dyson’s book, then, is that, while it doesn’t go into gory engineering detail, it drops enough hints to the cognoscenti to enable them to figure it out – exercises left to the reader. Dyson does this not just for tube-based computers, but for Monte-Carlo Method mathematics, population dynamics and thermonuclear reactions. In the latter case the key word is “opacity", and I betcha you need a pretty thick layer of FOGBANK to achieve that.

Unfortunately, toward the end of the book Dyson becomes vague, predictive and proscriptive, and adopts sister Esther’s ideas on how human evolution is going to make us all cyborgs, and all the world is going to look and act like the inside of Apple’s new spaceship headquarters. As though these are good things. Clearly, Dyson, who lives in the Pacific Northwest, really needs to get his mindset outside of Silly Con Valley and breathe the air of reality, out here in what is known as The Real World.

Indeed, it would be very handy if he’d bring some of his aetherial compadres with him, as they’re all desperately in need of a dose of reality. But I’d rather that they, once schooled, go back to Silly Con Valley so that us normal folks don’t have to put up with their incessant self-regard.

Other than that, though, the book is a great read, well written, and I recommend it to you all. ®