Intel raises memory deflector shields in Xeon E7 processor refresh

Silicon will lock off shared RAM so you don't have to do it in code

Lego Godzilla

Intel has given its Xeon E7 processor family its annual refresh, this time emphasising analytics at scale.

The new E7-8800/4800 v3 chips use the Haswell micro-architecture, meaning all Chipzilla's Xeons have made the jump.

Intel's been a bit cagey, and did not share the list of E7 v3 models as we were going to press, but we're assured there are lots of variants with up to 18 cores apiece. Four-socket systems are the sweet spot, but the 22nm chippery is happy working in systems bearing up to 32 sockets. Some models support up to 12 terabytes of RAM.

The chips pack Intel's Transactional Synchronization Extensions (you'll see it branded as “Intel TSX”), which let the silicon wall off portions of shared memory so that, for example, threads running in an in-memory database can't simultaneously trample each other when accessing the shared memory.

As explained to El Reg, protecting critical areas of memory in this way can be and is generally done in code using locks. Building transaction-processing mechanisms into silicon does what building things into silicon always does: adds speed, makes code leaner and hopefully makes for fun times in developer-land. (TSX was broken on earlier Xeons, but we're told it's been fixed.)

The transaction support in hardware also speaks eloquently about where Intel's aiming these CPUs, namely straight at folks who do a lot of analytics either in-memory or in other modes. Intel reckons the analytics market is going to go nuts.

The Xeon E7 v3 processor has 5.7 billion transistors and has a die area of 662 square millimeters. Speaking very generally, the Xeon E7 v3 chips offer about 40 percent better performance on the top-bin parts than the Xeon E7 v2 processors they replace...
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There's also some sweeties for more mundane tasks. “Run Sure Technology” is designed to help virtual machines fail gracefully, so they tell control freaks they're in strife and allow themselves to be settled down rather than making silicon a mess for their virtual neighbours.

The new CPUs are therefore also being pitched as replacements for 2010-era servers, with the premise being that nine such dinosaurs can be replaced with one E7 v3-equipped server, without reduction in performance or virtual machine density.

The new range isn't a massive upgrade. Intel folks described them to El Reg as “picking off a few of the last remaining things” needed to make the silicon super-reliable and better-suited to analytics.

Chipzilla reckons these CPUs go up against IBM's Power and Snoracle's SPARC, and of course has produced numbers that says the Xeons trounce them both on just about any metric you care to mention.

Intel, IBM and Snoracle will continue their eternal wrestle among customers who need this kind of CPU. And as is always the case, users will find their own reasons to prefer one over the other.

More interesting action, given the rise and rise of cloud, seems to be in the denser end of the market - and there Intel has a different fight as its Xeon-D confronts emerging ARM architectures. We'll keep an eye on both market segments anyway. ®

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