Toshiba plans chippery with mere 0.5V power slurp by 2017
Tunnel field-effect transistors burrow through battery life barriers
Toshiba is getting ready to announce a low-power semiconductor technology it says will hit the market in scale in 2017.
Lower power is something of a holy grail in the world of chips: it means less heat to dissipate away from transistors. That in turn lets devices be clocked at higher speeds (because higher clock speeds increase power consumption).
According to Nikkei Technology, the basis of the Toshiba announcement will be TFET – Tunnel FET – technology.
This, the company claims, delivers faster switching at lower voltage. MOSFETs have had trouble reducing slope factor below 60 mW/decade “due to the thermal diffusion of electrons”, the NT report says.
TFETs, which switch states using electrons' interband tunnelling (a quantum mechanical rather than classical phenomenon), can get lower slope factors and therefore lower power.
The NT report says the TFETs Toshiba plans to announce will have an operating voltage half that of MOSFETS – “specifically lower than 0.5V” – and the leak current with the switch in the off-state is “about 1/100 that of MOSFET”.
Toshiba's research has been conducted in collaboration with the Green Nanoelectronics Centre, a project of Japan's National Institute of Advanced Industrial Science and Technology.
The company says its TFETs can be manufactured in familiar CMOS processes, and hopes the devices will be turning up in wearables, mobiles, and sensor products. ®
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