Silicon Graphics looks to MIPS to cover Merced delays

Silicon Graphics (SGI) yesterday went on record to commit itself to the MIPS Risc processor for at least two more generations of the current core and possibly a third incarnation beyond those two. Doubts were cast on SGI's support for MIPS last year when the company not only spun the chip developer -- which it bought out in the late 80s in a move designed to counter Sun's aggressive Sparc development plans -- as a separate business unit but stated its decision to migrate to Intel's 64-bit Merced chip for future high-end machines and the IA-32 architecture for low-end workstations. Now SGI will offer machines based on MIPS' R14000 CPU, which is due next year, and later on the R16000, scheduled to ship in 2001. Both processors will be updates of the current R12000 core. The R14000 will support double-speed backside cache memory and a 200MHz external data bus, twice that of the R12000. It will also offer a clock speed increase, taking the design to 450MHz. The R16000 will boost the clock speed to the 600-800MHz band. The current processor's 32K data and instruction L1 caches will be both the doubled to 64K. The chip will support up to 8MB of external L2 cache. The decision to continue with MIPS chips was based on customers demand for continuity over SGI's transition to Merced, claimed John Mashey, the company's chief scientist, in an interview with the Reuters news agency. SGI has said it will port its Irix Unix-derived operating system to Merced. However, the plan to stick with MIPS, at least for the immediate future, will guard against delays not only in the shipment of Merced CPUs but in SGI's effort to move the OS from one processor platform to another. The fact the R14000 and R16000 are little more than speed bumps of the R12000 suggests that SGI is doing little more than cover its rear end while MIPS pursues its designs on the embedded market. The possible fourth-generation R12000, presumably to be called the R18000, appears to be simply a more compact version of the R16000, again suggesting it's little more than a stop-gap to fill the hole left by a possibly delayed Merced and/or IA-64 Irix. ®