Sources close to Intel and AMD's plans say that up-and-coming .18 micron Celeron processors using a Coppermine core will indeed have half of their level two cache disabled. But,unlike the last time Intel performed this engineering feat, supplying Pentium IIs and Celerons based on the Pentium II but only with 128K cache, very aggressive pricing plans by AMD are likely to scupper attempts to make waves in the low end of the market. According to the sources, AMD has already forecast extremely aggressive prices for both Q2 and Q3 of this year, and its forthcoming Spitfire product will spoil Intel's plans. On an Intel roadmap we published recently, the company proposed that the .18 micron Celerons with the CuMine core would be put head-to-head against AMD Athlons. That is the first time Intel has officially recognised AMD products in its positioning of products. Perhaps a better idea for Intel would be to forget all about Celeron IIIs with castrated cache and instead sell Pentium III Coppermines at Celeron prices. That would put AMD in a sticky position, and help ready the market for the introduction of its 1.4GHz Willamette later in the year. ®