IDF Intel will follow the release of 'Nocona', its upcoming 90nm Xeon DP chip, with 'Jayhawk', the company admitted today.

Just as the next Xeon MP, 'Potomac', is set to be followed by a dual-core version of the chip, codenamed 'Tulsa', so Jayhawk could be a dual-core implementation of Nocona. However, Intel didn't say as much, and the part's use of single-core Nocona chipsets suggests Jayhawk may contain only one core, too.

In any case, Jayhawk will operate with the 'Lindenhurst' and 'Tumwater' chipsets, which bring PCI Express and DDR 2 SDRAM to the two-way server and workstation markets, respectively. The boards will also deliver the 800MHz effective bit rate frontside bus used by both Nocona and Jayhawk. Current Xeon DPs offer only a 533MHz FSB.

Nocona is expected to debut at 3.06GHz to 3.4GHz; Jayhawk is likely to take clock frequencies to 4GHz. Jayhawk is expected to ship in the second half of 2004, probably toward the end of the year and possibly even early 2005. Nocona's official release window is H1 2004, said Intel, but we expect it to appear sooner rather than later, Lindenhurst arriving at the same time, probably in the Q2 timeframe.

Tumwater brings Nocona - and, ultimately, Jayhawk - to the workstation arena, in the low-end, mid-range and high-end segments.

Intel reiterated its immediate Xeon MP roadmap: the 90nm Potomac will ship during the first half of next year and will work with the DDR 2 and PCI Express chipset 'Twin Castle'.

Before Potomac arrives, Intel will ship a version of the current Xeon MP with 4MB of L3 cache, early next year. It will run at 3GHz. ®