Itanic locked Inattic for IDF

Next week's a big week for Intel: it's when we finally reveal the winners of our Gelsinger Coefficient challenge. Meanwhile, down in San Jose, Chipzilla will be hosting its biannual Intel Developer Forum.

We were surprised to read reports yesterday that IDF would be a kind of coming-out party for IA-64. A month ago Intel told us there was nothing special planned for Itanium at this coming IDF, and a glance at the schedule reveals as much. Although the agenda looks like a Whistler gala, with over a dozen technical sessions devoted to WinXP, there's a drought of talks on IA-64 itself. The only one we could find directly relevant, was this one, by HP staff talking about porting PA-RISC apps to Itanic.

When we inquired if there was some hidden agenda here, the good folk denied it, and we believe them. Intel has plenty of interesting server stuff brewing, not least the SMT-enabled Foster we'll hear about later this year, and it would rather not blow it, thank you, by people poring over the progress of IA-64.

So for the second successive Developer Forum, Intel will keep baby Itanic locked out of sight in the attic. That baby Itanic is slow, overweight and prone to high temperatures is not to be unexpected in an infant. But so "hideously ugly" is Itanic, according to recent benchmarks, that visiting press will have to make do with hearing screams and crying from upstairs.

Recent figures posted by CERN labs' Fons Rademakers, a Linux cluster guru, show a two-way 733Mhz IA-64 running a technical data analysis benchmark at a quarter of the speed of an equivalently-clocked two-way Xeon. Figures confirmed by testers we've spoken to confirm this. Performance sucks.

"The good thing is that the programs runs correctly," concludes Rademarkers. "However, as it stands now it looks like Merced will be a major dud."

As clock-speeds indicate, IA-64 Merced is running 18 months late. In fact it's exactly 18 months since we were given samples of the first Merced chips to play with at the Fall 99 IDF. Linley Gwenapp fuelled speculation that McKinley might be late after Intel withdrew a document describing the chip from the recent ISSCC conference in San Francisco.

So Intel's challenge is to persuade the Fourth Estate that the Itanium adventure is still worthwhile, and that McKinley will eventually deliver the goods. Not everyone shares that point of view: inspite of process improvements IA-64 is bandwidth challenged, and that leaves enough of a performance premium for IBM, Compaq and Sun to continue investing in their respective chip architectures. Pointing out McKinley's bandwidth handicap, Paul deMone noted "an [Alpha] EV7 "in a MP system can exchange 6.4 GB/s of data with each of its four neighbouring MPUs." However, even at the low-end, SMT Foster ought to dominate the server business for price/performance. Unobtanium is more likely to cannibalised by Intel's own multithreaded P4 chips than by RISC rivals running loss-leaders.

Perhaps, taking a leaf from the British royal family, Chipzilla can confine its handicapped offspring upstairs for good - and pretend it never was born? ®

In this story, we invited readers to determine the formula of the elusive Gelsinger coefficient. A high standard of entries has already been set, but it's not too late to enter. A prize of a Register baseball cap goes to the most creative entry.