Original URL: http://www.theregister.co.uk/2013/08/20/vlsci_fires_up_20_teraflop_barcoo/

VLSCI fires up 20 teraflop Barcoo

New super is also a Xeon test bed

By Richard Chirgwin

Posted in HPC, 20th August 2013 03:42 GMT

The Victorian Life Sciences Computation Initiative – VLSCI – has gone live with its latest big iron, Barcoo, an x86 architecture machine with double the capacity of the facility's Merri x86 system.

The 70-node Barcoo runs 1,120 Sandy Bridge cores (16 cores per node), with 20 Xeon Phi 5110P cards distributed across ten nodes. There are 67 nodes with 256 GB RAM, and three with 512 GB RAM. There's also the usual InfiniBand connection, and Barcoo shares the same 350 TB storage as is used by Merri and the facility's BlueGene/Q machine named Avoca.

Excluding the Xeons, Barcoo is rated at 20 teraflops.

According to VLSCI's director Professor Peter Taylor, the new machine is designed to serve different workloads, as well as acting as a proving platform for the Xeon architecture.

It was originally expected that Barcoo would replace Merri, but in a planning process that began two years ago, it was determined that a new machine would fit within VLSCI's power, floor space and cooling budget.

As well as giving the facility's users access to newer Intel technology, Taylor told The Register, the new machine is designed for workloads that need larger chunks of memory.

Some bioinformatics workloads, he explained, demand very high parallelisation, which works well on the Blue Gene/Q machine. “Other workloads are less parallel, but want a very big memory footprint” – and that's what Barcoo is designed for.

The decision to try to accommodate different user needs, rather than sticking to a single architecture “is a challenge for any facility”, Taylor said, but “we have the resources, the funding, and the support to do this.”

It's also a good opportunity to get users familiar with architectures that will be more widespread in coming years, Taylor said. “Individual processors aren't getting faster, so we expect the trend of more processors per chip to continue for at least the next half a decade.

“We felt it was timely for our user community to see what they could get from the Intel Xeon 5. This was the opportunity to equip a machine with some of these.”

Users will then be able to work out how well their software works with the new architecture, ahead of a “major technology refresh” expected within three to four years' time, he said.

While some facilities are heading down the Xeon route “in a big way” (Taylor cited the Texas Advanced Computation Centre), VLSCI is at this stage offering an exploratory platform.

“The whole field is in a state of flux – the future seemed clearer two or three years ago than it is at the moment,” he said.

Since users need to know how the new architectures will affect their code, “We have to be in a position to give advice to our users – whether Intel or IBM Power Series – the sorts of things that will power the high-end machines in the future.” ®