Original URL: http://www.theregister.co.uk/2011/06/03/moneta_pcm_prototype/

PCM prototype beats PCIe flash

Student boffins' box slower at large writes though

By Chris Mellor

Posted in Storage, 3rd June 2011 10:58 GMT

A first-generation Phase Change Memory device has been built, faster than OCZ's VeloDrive PCIe flash card with random blockI/O but slower with sequential writes.

University of California, San Diego (UCSD) student boffins in the Computer Science and Engineering department at the Jacobs School of Engineering built their Moneta device using Phase Change Memory (PCM) chips from Micron. These use electricity to change the state of a Chalcogenide alloy from poly-crystalline to amorphous and back again.

The two states have differing resistance, read with a lesser electric current. Micron obtained the technology when it bought Numonyx. PCM technology promises to be faster than flash, but has proved difficult to productise.

The UCSD team built a Moneta emulation system in 2010, using FPGA and DRAM. It attached to its host computer system via an eight-lane PCIe 1.1 interface that provided a 2GB/sec full-duplex connection (4GB/sec total). They realised that building the PCM hardware was only one side of the coin; storage software code in device drivers and the operating system (OS) needed to change as well, and stop assuming the target storage device was slow.

In a 2010 research paper (pdf) they calculated Moneta's storage performance using the hardware emulation system:

Results for a range of IO benchmarks demonstrate that Moneta outperforms existing storage technologies by a wide margin. Moneta can sustain up to 2.2GB/sec on random 4KB accesses, compared to 250MB/sec for a state-of-the-art flash-based SSD. It can also sustain over 1.1 million 512 byte random IO operations per second [IOPS]. While Moneta is nearly 10× faster than the flash drive, software overhead beyond the IO stack (e.g., in the file system and in application) limit application level speedups: Compared to the same flash drive, Moneta speeds up applications by a harmonic mean of just 2.1×, demonstrating that further work is necessary to fully realise Moneta’s potential at the application level.

PCM prototype performance

The team has now built a Moneta system using Micron PCM chips. These are installed on Onyx cards. Judging by the hardware seen in the pictures below it is clear that the research team has had a lot of help from Micron and other identified partners; BEEcube and Xilinx, to be able to build such a sophisticated research device.

Onyx PCM card

Onyx Phase Change Memory card (UCSD)

The initial performance is impressive; Moneta can read large amounts of data at up to 1.1GB/sec and write it at up to 371MB/sec. For smaller accesses of 512 byte blocks it can read at 327MB/sec and write at 91MB/sec. The team claims this is "between two and seven times faster than a state-of-the-art, flash-based SSD". The 1.1GB/sec speed is half that of the emulated hardware prototype.

Onyx cards installed in Moneta enclosure

Onyx PCM cards installed in Moneta enclosure (UCSD)

Most PCIe flash product uses IOPS as its small block read performance measure. OCZ's VeloDrive is different and that does 29MB/sec with HW RAID when reading 4K blocks and 58MB/sec when writing them. Moneta is more than ten times faster at reading, but only about half as fast as the OCZ card when writing. For a student boffin's team prototype, that's quite amazing.

With software RAID the VeloDrive's sequential read bandwidth tops out at 1.05GB/sec, about the same as Moneta. It can write sequential data at up to 1GB/sec as well, which is more than 2.5X Moneta's maximum write speed. Micron's latest P320h PCIe card writes sequential data at 2GB/sec and reads it at 3GB/sec. Back to the drawing board, Moneta boffins.

PCM software

The Moneta team had this to say about legacy storage controlling software based on hard disk drive storage:

This legacy takes the form of numerous hardware and software design decisions that assume that storage is slow. The hardware interfaces that connect individual disks to computer systems are sluggish (300 MB/sec for SATA II and SAS, 600 MB/sec for SATA 600) and connect to the slower “south bridge” portion of the CPU chip set. RAID controllers connect via high-bandwidth PCIe, but the low-performance, general-purpose microprocessors they use to schedule IO requests limit their throughput and add latency.

Software also limits IO performance. Overheads in the operating system’s IO stack are large enough that, for solid-state storage technologies, they can exceed the hardware access time. Since it takes 20,000 instructions to issue and complete a 4 KB IO request under standard Linux, the computational overhead of performing hundreds of thousands of IO requests per second can limit both IO and application performance.

We show that a redesigned IO stack combined with an optimised hardware/software interface reduces IO latency by nearly 2× and increases bandwidth by up to 18×.

Next steps

The team hopes to build a second generation Moneta device in the next six to nine months, which implies that Micron will be bringing out second generation PCM chips. We have asked Micron about this but haven't had anything back yet.

Steven Swanson, professor of Computer Science and Engineering and director of the Non-Volatile Systems Lab (NVSL) at UCSD, foresees commercial products within a few years; so we are looking beyond 2014 before actual PCM devices appear. He says work will need to be done on the software front to fully realise the benefits of the PCM hardware.

Such software advances could benefit NAND flash devices as well. Based on the boffins' box, PCM is still promising but is far from grinding NAND performance into the dust, and is slower at sequential data IO. Also, it my well be that HP brings out Memristor storage devices before then.

The boys at UCSD have more to do. However, since Micron's PCM people will be only too aware of what the P320h can do, they will be well primed up with the bar that any second generation PCM chip has to get over.

The Moneta system will be shown at the Design Automation Conference (DAC 2011) in San Diego, 7-9 June. ®