Original URL: http://www.theregister.co.uk/2009/08/21/pci_3_delay/
PCI organisation confirms PCIe 3.0 delay
Six-month setback to ensure full backwards compatibility
The next version of the PCI Express bus standard, 3.0, won't appear until 2010 and not this year as originally anticipated.
Publication of the final version of the specification inevitably leads the appearance of devices that incorporate the standard, so the delay pushes the release of PCIe 3.0-compliant kit out from 2010 to 2011.
The delay was confirmed by PCI Special Interest Group President Al Yanes. Speaking to PC Magazine, he said the delay was necessary to ensure that the complex new standard retains backwards compatibility with PCIe 1.0 and PCIe 2.0.
PCIe 3.0 ups the bus' clock to 8GHz. It also ups the previous version's data-encoding schemes fro 8/10-bit to 128/130-bit. One upshot of changing the encoding scheme is that the cost to data transfer is reduced from 20 per cent to around 1-2 per cent, ensuring more real data is sent at any given clock cycle.
That means PCIe 3.0 will have an effective bandwidth of 7.99Gb/s, compared to the 5Gb/s-rate PCIe 2.0's effective bandwidth of 4Gb/s. That's a doubling of bandwidth without the need to aim for 10Gb/s with all the greater signalling issues that 10GHz brings over 8GHz.
The downside is the extra work Yanes and co. think necessary to ensure backward compatibility and the six-months-or-so delay to the standard's release. ®