Original URL: https://www.theregister.co.uk/2007/10/18/istor_iscis/
Avoiding x86 cuts iSCSI cost and watts
iStor claims speed record for single-chip iSCSI controller
An iSCSI developer said it has bucked the trend towards using standard servers to power storage appliances, instead using specialist chips that it designed itself.
The company, called iStor, claims that as a result, its latest iS512 subsystems not only out-perform rivals such as EMC, EqualLogic, Intransa and LeftHand, but they are cheaper and consume less power too.
"The benefits of our ASIC (application-specific integrated circuit) approach are cost and power consumption," stated Tim Beck, iStor's Euro boss. "Our ASIC is 12W, the whole controller is 65W." By comparison, an x86 server would consume hundreds of watts, he said.
Alan Shepherd, who runs iStor's UK distributor AxStor, said the iS512 has dual active-active controllers, a duplex 10Gig Ethernet port and 12 drive bays. It can stream data out at over 1100MB/s (9Gbit/s), out-performing duplex 4Gbit/s Fibre Channel.
He said that with 10Gbit/s Ethernet adapters constrained by Windows to around 3.6Gbit/s, a single iS512 can saturate three servers.
A basic 2TB system costs less than £7000, while a version with 3TB of SAS or 12TB of SATA would be around £11,000, Shepherd said. "SAS is still about three times the cost per MB of SATA, although the gap gets lower as you go up in capacity," he noted.
He added that as the iS512 supports SAS expanders, it can scale to 128 disk drives.
However, a rival warned against proprietary controller chips, and argued that there's good reasons why other iSCSI developers have moved towards standard platforms.
"Standard servers make it easy to scale, and the x86 is a very stable architecture - if you have a failure, it's typically not the server," said Henrik Hansen, European marketeer for LeftHand Networks.
Developing both hardware and software means two major investments instead of one, he argued. He added that it's even more expensive if you don't discover your ASIC design errors until after they have been turned into silicon. ®