Original URL: http://www.theregister.co.uk/2005/10/24/pasemi_power/
DEC veterans prepare chip challenge for Intel, AMD, IBM and Sun
PA Semi Powers up
If you were contemplating starting an IT company, deciding to go up against the likes of Intel, AMD, IBM, Sun Microsystems, Toshiba, Sony and TI with a new processor probably wouldn't seem like the smartest or most feasible idea. In fact, you'd likely characterize the idea as ludicrous with a dash of hopeless. That is unless you had assembled a ton of cash and an army of very talented and successful chip design mercenaries.
PA Semi is this start-up hoping to turn a concept many might see as hopeless into gold. It has recruited top engineers that worked on processors such as DEC/Compaq/HP's Alpha chip, AMD's Opteron, Sun Microsystems' UltraSPARC and even the lowly Itanium monster from Intel. These brains have come up with their own take on IBM's Power processor design and developed a dual-core chip that will run at 2GHz while consuming between just 5-13 watts on a typical software load. Such performance per watt figures would let the PA Semi PWRficient chips run in everything from embedded devices to supercomputers.
"With this company, we are really driving a breakthrough in performance per watt," said PA Semi's CEO Dan Dobberpuhl in an interview. "I think we will be way ahead of everyone."
Dobberpuhl has earned the right to talk big. He's a legend in the IT and chip industry in particular after leading much of the work with the Alpha processor. As CEO of PA Semi, he has managed to secure millions in venture capital - enough cash in fact to hire close to 130 engineers and around 150 total employees. Some of the class names on PA Semi's staff include Mister Tanglewood Peter Bannon, ex-AMD crazy man Wayne "I celebrate Michael Bolton's entire catalogue" Meretsky, Jim "Hyper" Keller and just about every other former DEC chip engineer not currently at HP, Intel, Sun or IBM.
This team hopes to capitalize on the move toward green computing where systems run fast while consuming less power than in the past. PA Semi's first processor - the PA6T-1682M - will sample in the third quarter of 2006 as a 2GHz, dual-core product with two DDR2 memory controllers, 2MB of L2 cache, support for eight PCI Express controllers, two 10 Gigabit Ethernet XAUI controllers, and four Gigabit Ethernet SGMII controllers sharing 24 serdes lanes. The product will ship widely in 2007 and be followed by a single-core chip in early 2007 and a four-core chip in late 2007. PA Semi also has plans for an eight-core processor in 2008.
It's not easy being green
The notion of green computing got its first mainstream attention thanks to the efforts of Los Alamos Labs whiz Wu-chun Feng and blade server pioneer Chris Hipp. These two individuals pushed the use of the Transmeta processor in server blades back in 2002.
At the time, most processor makers scoffed at the idea of using such low-performing chips in clusters even though the products improved system up-time and delivered adequate horsepower for many applications. Then, however, attitudes began to change as the likes of Sun and IBM revealed plans for multicore chips that made use of slower than usual cores. Processor makers had realized that they could no longer continue to up GHz at historic levels because of heat issues and a disconnect between processor and memory performance.
Eventually, AMD rolled out new 64-bit processor designs that proved far more energy efficient than competing chips from Intel, forcing Intel too to change its play and adopt performance per watt marketing. Intel cancelled plans for a 4.0GHz Pentium chip and reworked its server processor designs to make better use of dual and multicore technology. While Intel trails rivals on the green computing front, it has promised to deliver server and desktop products in 2006 that best the competition's performance per watt figures. We'll see.
Cooler than cool
The folks at PA Semi don't think the mainstream processor makers have gone far enough. They have licensed IBM's Power design and claim to have created a chip that is 3- to 9-times more efficient than even Intel's upcoming products.
With such low power consumption, PA Semi hopes to get its products in high-end printers/copiers, switches, security appliances, storage boxes, servers and digital entertainment systems.
For the geeks out there, PA Semi explains its chip architecture as follows
The PWRficient family of platform processors is derived from a common set of fundamental architectural elements. A coherent, ordered crossbar called CONEXIUM interconnects multiple Power cores, L2 caches, memory controllers, and the ENVOI I/O subsystem. ENVOI combines a set of configurable serdes lanes with a set of protocol controllers for such I/O standards as PCI Express, Gigabit Ethernet, and 10 Gigabit Ethernet.
These controllers share a bridge to CONEXIUM, as well as a set of centralized DMA channels, offload engines, and a coherent I/O cache. The architecture supports a variety of offload engines, including support for TCP/IP, iSCSI, cryptography (IPSec and SSL), and RAID. This layered, scalable architecture results in versatile single-chip solutions that can be quickly developed by combining the appropriate number of Power cores, memory controllers, and L2 caches with a suitable number of serdes lanes and protocol controllers.
P.A. Semi also employs a unique scalable-socket plan, which provides several options for performance upgrades or cost reductions with little or no design effort. P. A. Semi defines a 'socket' (package, pinout, and power envelope) by the number of memory controllers (up to four), the number of serdes I/O lanes (up to 32), and the supported system peripherals. Each socket supports several performance levels by varying the number of cores (up to eight on a chip) and the size of the L2 cache (up to 8MB). Within a socket definition, processors are tailored to different applications by adjusting the number and type of the high-speed I/O protocols (for example PCI Express, 10 Gigabit Ethernet, 1 Gigabit Ethernet, SATA/SAS, RapidIO, and Fibre Channel). Initial socket definitions include the 'E' socket (entry), 'M' socket (midrange), and 'P' socket (performance). Customers can design to a specific socket, instead of a specific processor, to enable easy migration to compatible processors.
There's more detailed information on the chip available here, and we'll be covering the first official unveiling of the processor family tomorrow at the Fall Processor Forum in San Jose.
Chip giants don't fold easy
There's little doubt that PA Semi is the most interesting chip start-up to come along in quite some time - probably since Transmeta. Its performance per watt figures blow away anything the competition has revealed to date, and it appears that the Power-based products could be a huge hit in the server and storage markets, in particular.
The problem here is that PA Semi's product doesn't arrive until 2007, and it's almost impossible to say what Intel, AMD, IBM and Sun will be selling at that time. All of the companies have talked up impressive multicore designs, and they enjoy massive existing customer bases. Remember that Transmeta too had compelling technology but could not overcome the might of Intel. Chip start-ups need flawless execution and gear that is not just better but rather phenomenally better than standard products.
In addition, PA Semi has picked the Power architecture, which seems like a limiting play. It will piggyback on IBM's huge Linux on Power efforts and benefit from this investment and the strength of Power's design. Linux customers, however, have proven time and again that they're most comfortable with x86 chips. Take, for example, IBM's recent decision to cull a Linux-only Power server line and open all boxes back up to AIX.
What PA Semi has on its side is a team with proven credentials and a truly unique design. Industry watchers will keep a close eye on this start-up, looking to see where its chips pop up first. If a couple of server wins close, expect the big boys to get very nervous. ®