VIA has just introduced its latest C3 x86-compatible processor, an 866MHz follow-up to the 800MHz part codenamed Ezra it shipped a wee while back.

The 0.13 micron chip contains a large, 128KB L1 cache, a trait shared by all VIA's CPUs derived from the IDT/Centaur WinChip processor development operation it bought up a year or so ago. VIA has been slowly upping the L2 cache size since then. The latest model contains 64KB of it, and the next generation of the family, codenamed Esther, will have 128KB. Nehemiah, the next-version-but-one will have a 256KB cache.

Nehemiah is expected to sample next quarter. Esther will ship in the same period. Esther should take the chip family to gigahertz clock speeds.

The C3 introduced today supports frontside bus speeds of 100MHz and 133MHz, connecting through a Socket 370 interface. In addition to the regular x86 instruction set, it can handle Intel's MMX and AMD's 3D Now! instructions. ®

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