Original URL: https://www.theregister.com/2000/02/15/yu_rips_opens_willamette_kimono/

Yu rips opens Willamette kimono

Roadmaps, roadmaps...roadmaps

By Mike Magee

Posted in On-Prem, 15th February 2000 17:35 GMT

Intel Developer Forum Senior Intel VP Albert Yu has outlined Intel's roadmap for the rest of the year and promised that by next year, millions of Willamette processors will ship. By the end of the year, 100s of thousands of Willamettes will be available, said Yu. Earlier, during chairman Andy Grove's speech, Yu had demonstrated a system running at 1.5GHz, and showed a small chip which he said was a Willamette. Yu said that Willamettte will use a 400MHz system bus, use Screaming Sindie 2, which will allow 128 bits (2 x 64) to be used by the floating point unit. The integer arithmetical logic unit (ALU) runs at twice the clock speed allowing for higher clock speeds, said Yu. Willamette is optimised for the Rambus platform. The encryption abilities of the Willamette Screaming Sindie II will also provide more security, said Yu. The system bus is similar to the P6m using a 3.2Gbps transfer rate, he said. He said that Intel had now five fabs running "full blast" on .18 micron and that this would rise to six fabs in the second half of this year. Yu also outlined details of other Intel introductions during the first and the latter half of this year. Celerons will move completely to .18 micron technology by the first half of this year and achieve speeds of 600MHz. The Pentium III Coppermines, both desktop and Xeon, will rise to 900MHz by the end of the second quarter, and greater than 1GHz with 256K cache in the second half of this year. Celerons will use the i810 chipset until the middle of the year, and in the second half of the year will have clock speeds exceeding 700MHz and use the 810e and the 815 chipsets. Yu said: "We'll introduce Timna in the second half of this year. Timna is designed for sub $600 value PCs." The Timna will have integrated memory controller, graphics and cache. It will start off by using synchronous DRAM. In the second half of this year, mobile Pentium III procesors will exceed 850MHz and use Solano 2 and 440ZX chipsets. ®