Design company Cadence and the Taiwan Semiconductor Manufacturing Co (TSMC) have struck a deal to create a high end toolkit for system on a chip designs. According to the companies, the deal means 10 to 30 per cent better chip performance, plus a shrink of the chip size (die) by around 10 per cent. TSMC, a major foundry, can now offer .18 micron, .25 micron and .35 micron kits using Cadence designs. According to the companies, the kits include files, so-called "parasitic extraction" and physical verification rule files. The Taiwanese foundry is now one of the world's largest producers, with fabs in Taiwan and joint ventures in the US and Singapore. Last Friday it confirmed it was in talks with National Semiconductor to take over a fab in Maine. ®