Boffin supercharges FPGAs with timing signal tweak

A Swedish researcher has discovered a new way to optimise FPGA performance, with as much as a five-fold boost on offer.

However, it's been a long and painful process for researcher Carl Ingemarsson to get to publication, including having his work plagiarised three years ago.

The problem for then-undergrad Ingemarsson, of from Sweden's Linköping University and now a PhD student, started years ago when he was challenged to make an FPGA run faster. To do so, Ingemarsson decided to look at how timing signals are routed.

FPGAs – Field Programmable Gate Arrays – are programmed post-manufacture, using mostly vendor-supplied software. If, for example, you have a genius idea for how to program an Altera device to mine Bitcoin, you can write it with the FPGA vendor's software, which then compiles that code for the device.

That puts the software in charge of how clock signals move around the device – and that's what Ingemarsson decided to work on for an undergraduate assignment, with a processing target of 450 MHz for a fast Fourier transform.

The university's media release explains that he reached the 450 MHz, in work that laid ground for his current doctoral studies.

His senior lecturer Oscar Gustafsson explains: “Normally, you choose an algorithm that can carry out the desired calculations, and then build up the structure, the architecture, using the required blocks. This is then transferred to the FPGA. But we have also looked at how the logic is built up, the routes the signals take, and what happens to them inside the chip. We have then adapted the architecture and the mapping onto the chip using the results of this analysis.”

The performance gain comes from making signals take a smarter route on-chip, something Gustafsson and Ingemarsson believed should be possible to automate for chip optimisation – and that's where things got difficult.

Trying to get a paper accepted for publication, reviewers seemed to think what was on offer was “too simple, or too ingenious”.

Someone else, however, noticed his work, and lifted the paper almost in its entirety to present at an IEEE conference as their own – the 2014 Sixth International Symposium on Parallel Architectures, Algorithms and Programming.

Fortunately, that plagiarism was noticed and reported, resulting in this takedown.

And, it seems, Ingemarsson has achieved publication at last, in the IEEE's Transactions on Very Large Scale Integration Systems 2017, here.

While the research in his publication was carried out on Xilinx devices, Ingemarsson believes it should be applicable to other FPGA families as well.

Ingemarsson now works for Ericsson, the university says, and is starting a microbrewery with his wife, meaning once his thesis is presented, he'll toast it with their own beer, something El Reg can only endorse. ®