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Meet ARM1, grandfather of today's mobe, tablet CPUs – watch it crunch code live in a browser

Gate-level blueprints restored for anniversary

Pics Chip geeks have produced an interactive blueprint of the ARM1 – the granddaddy of the processor cores powering billions of gadgets today, from Apple iPhones to Raspberry Pis, cameras, routers and Android tablets.

The peeps behind the fascinating blog visual6502.org normally reverse-engineer chips by pulling the silicon out of their plastic packages, photographing the circuitry using ultra-high-resolution imaging systems, and visualizing the electronics after painstakingly analyzing the semiconductor gate construction – here's the 6502 CPU from the BBC Micro, Commodore 64, Nintendo Entertainment System, Apple IIe, and many other computers.

In the case of the ARM1, to celebrate the 25th anniversary of Brit chip architects ARM, the team have managed to lay their hands on the original designs of the 32-bit RISC processor core, and visualized it for the web: you can single-step, or race through, instructions, and watch how the ARM1's transistor gates operate as code and data is clocked through the circuitry in your browser. You can also zoom in and out of the blueprints, and rove around the layout, exploring the core's subsystems.

The ARM1 is a milestone in British engineering: in late 1983, Steve Furber and Sophie Wilson – two engineers based at Acorn Computers in Cambridge, UK – visited and observed chip designers in America, and decided processor design wasn't as scary as they first imagined. So they set about formally sketching out a 32-bit RISC microprocessor to power future Acorn microcomputers, at one point modeling the instruction set in BBC BASIC.

Eventually, about 18 months later, they produced the ARM1 – a tiny, low-power, efficient CPU fabricated by VLSI Technology with roughly 25,000 transistors using a 3,000nm (3μm) process. Today, a quad-core Intel Skylake Core i7 processor, with builtin GPU, has 1,350,000,000 transistors using a 14nm process.

Youtube video

The ARM1 was essentially a prototype, and was quickly followed by the ARM2, which was used to launch Acorn's Archimedes family of computers. The ARM2 had pretty much the same instruction set as the ARM1, although featured new multiplication and (later) atomic swap instructions. Next came the ARM3 with an integrated data and instruction cache that really made programs run like butter off a hot knife.

Then we jumped to the ARM6 (an ARMv3 chip) that moved the architecture to a full 32-bit address space, and the rest is history: today the ARMv7 and ARMv8 architectures in Cortex-A cores power the world's smartphones, tablets and other devices. Their Cortex-M cousins are used as microcontrollers, and Cortex-R cores are used in real-time systems, such as hard drive controllers.

More or less, the 32-bit RISC ARM instruction set hasn't changed too much since the mid-1980s; a more compact instruction set called Thumb was introduced by ARM for handhelds and small embedded gizmos, and the 64-bit ARMv8 instruction set, launched in 2011, resembles MIPS64.

One very nice thing about the 32-bit instruction set is its pervasive conditional execution, which helps one avoid branching over code. For example, this sequence of instructions resets the register r0 to 0 if its value is equal to or less than zero, or forces its value to 1 if its value is greater than zero:

 CMP     r0, #0   ; if (r0 <= 0)
 MOVLE   r0, #0   ;   r0 = 0;
 MOVGT   r0, #1   ; else r0 = 1

Without the conditional moves (MOVLE and MOVGT) after the compare (CMP), you'd have to branch after the compare, which is wasteful.

Die hard ... the ARM1's silicon in all its glory (Credit: Visual6502.org)

ARM was spun off from Acorn in 1990 before the latter imploded in the late 1990s; today, ARM is a £250m-a-year business with 3,300 employees licensing processor core designs to chipmakers worldwide. The first proper operating system developed for ARM, Acorn's RISC OS, continues as a community-run project, powered by modern 32-bit ARM cores.

Close up ... the semiconductor layout for the ARM1

Here's what the Visual6502.org team have to say about the visualized ARM1:

Designed by Sophie Wilson and Steve Furber before there was an ARM Ltd., the Acorn RISC Machine was the first of a line of processors that power our cell phones and tablets today. Unlike our projects based on microscope images, the Visual ARM was created from a resurrected .cif chip layout file, used under our license agreement with ARM. We also photographed one of the few ARM1 chips at very high resolution, and our photograph is featured at the Centre for Computing History in Cambridge.

Credit goes to ARM founding engineers John Biggs for inspiring the project, discovering the tape, and recovering a usable .cif file, Lee Smith for spotting the variable record format used to encode the file (an artifact of the VMS on Acorn's VAX that at first appeared to be widespread corruption of the file), to Cambridge University Computing Services for reading the Exabyte tape, and to ARM founder Dave Howard for help unraveling the VLSI CIF dialect. Our chip simulation and visualization was developed by Barry Silverman, Brian Silverman, Ed Spittles, and Greg James.

Evaluating options ... the prototype ARM1 as a BBC Micro coprocessor (Source)

You can read more about Sophie Wilson and Steve Furber's contribution to Acorn, ARM, and computing worldwide here and here. Today, Furber is an ICL Professor of Computer Engineering, working on neural systems, and Wilson is a top Broadcom engineer. ®

Many thanks to Computerphile for the video interview with Prof Furber.

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