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IBM chip boffins mix phase-change-flash cocktail: Voila! SUPER fast memory card

PCM-flash PCIe mutant will stay in the lab... for now

Internet Security Threat Report 2014

IBM has gone and surprised us all with a pretty good Phase Change Memory product research and demo effort: a hybrid PCM/NAND server flash card that has at least 12 times lower latency than an enterprise PCIe flash card.

The hybrid card, Big Blue claims, completed 99.9 per cent of 32-sector write requests each within 240 microseconds. A consumer-class SSD took 275 times longer before it started writing the data in the test IBM carried out.

Phase Change Memory (PCM) uses a chemical state change (from amorphous to crystalline) in a chalcogenide alloy, with the differing resistance levels of the two states signalling a binary 1 or 0. The change in state is caused by controlled heating.

PCM has been mooted as a follow-on technology to NAND, which is running out of acceptable error rates and endurance as cell geometry shrinks below 16nm.

PCM cells can be written to (reprogrammed) at least 106 times. The performance and price characteristics of PCM lie between DRAM and NAND.

But productising PCM has been problematic, partly because it has a relatively high write latency, and so this IBM Research demonstration is significant.

Ioannis Koltsidas, a semiconductor memory boffin at IBM's Zurich labs, in conjunction with colleagues there and at the University of Patras, built a hybrid PCIe card furnished with both NAND and PCM and tested its performance. They called it a Prototype Storage Subsystem (PSS) and you have a look at a presentation deck about it here (slideshare).

PSS PCM PCIe card diagram

PSS schematic drawing

Micron P5Q 128 Mbit PCM chips were used with 90nm technology nodes. These were commercially available when the project started at the end of 2012.

The write time for a sector I/O (512B + 64B) was 1.15 msecs with the read time being 75.24 µsecs – so it's a tad asymmetrical. More sub-banks on the card make for a better write performance while more sub-channels improve the read performance.

Koltsidas states: "We chose a configuration that minimises write latency without severely penalising reads." He adds: "The design of PSS targets storage workloads that are dominated by small (eg, 4 KB) random I/O operations and aims to achieve low, predictable latency with reads and writes."

PSS PCIe card

PSS PCIe card

The testing results included a chart of latency profiles for the PSS card, an MLC flash PCIe card, and a TLC(3-layer cell) SSD - the baseline in effect. The test used "per-I/O latency measurements for two hours of uniformly random 4KB writes at QD=1 (after 12 hours of preconditioning with the same workload.)"

Latency Profile PSS PCIe card

Overall the Zurich boffinry noted:

  • PSS achieved good performance
    • 65k Read IOPS @ 35 μsec
    • 15k Write IOPS @ 61 μsec
  • PSS achieved consistently low write latency
    • 99.9 per cent of the requests completed within 240 μsec - 12x and 275x lower than MLC and TLC flash SSDs respectively
    • Highest observed latency was 2 msec - 7x and 61x lower than MLC and TLC Flash SSDs, respectively

The PSS card's latency was 12 times lower than an MLC SSD but this is not such a big deal, not relatively; and if we want faster flash we could use an SLC flash PCIe card. However it used old PCM chips, 18 months old technology, and newer PCM chips may well be better.

With this result Koltsidas said that PCM is a promising new technology and suggests the following use cases for a PCM card:

  • Caching device
  • Metadata store
  • Backend for low-latency Key-Value store
  • Tiered storage device in a hybrid configuration with Flash

That seems sensible. Whether IBM will build such a card is another question. We think it's unlikely to leave the lab.

Perhaps Micron or another PCIe flash card supplier might make one though, if the cost profile is acceptable and customers will pay sufficient money for the performance improvement. ®

Internet Security Threat Report 2014

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