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First 'production-ready' EUV scanner laser-fries its guts at TSMC. Intel seeks alternative tech

Finicky chip-etching tech of the future looking like it may always be just that

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Analysis A recent test of the next-generation chip-etching technology known as extreme ultraviolet lithography (EUV) has come a cropper at chip-baking giant Taiwan Semiconductor Manufacturing Company (TSMC).

Coincidently, Intel spokesman Chuck Mulloy has confirmed to The Reg a report that his company has joined up with Dutch semiconductor lithography systems giant ASML Holdings, French specialty-chemicals provider Arkema, and others to form a research consortium to investigate one of EUV's possible replacements – directed self-assembly (DSA) – in the drive to keep Moore's Law alive.

Simply described, DSA is a promising technology that coaxes materials to assemble themselves into patterns – as its name suggests – rather than etching those patterns into a material, as does lithography.

The EUV failure at TSMC was reported by Semiconductor Engineering, which said that a trial run of a "production-ready" EUV lithography tool built by ASML crashed during testing due to problems with a laser mechanism inside the unit.

"It was a laser misalignment," the manager of TSMC's next-generation lithography department Jack Chen told attendees at this week's SPIE Advanced Lithography conference in San José, Semiconductor Engineering said. Not that TSMC is giving up on EUV – according to Chen, his company is still planning to insert EUV at the 10-nanometer node. "That's our goal," he said.

If so, the recent cock-up has pushed that goal further out. Semiconductor Engineering says that one process-technology expert with whom they spoke told them that the incident will knock back progress for the "foreseeable future, possibly for another year."

The setback is just the most recent one for EUV, once the darling of the semiconductor industry, but now increasingly regarded as a money pit – and possibly one that may never be the answer to the problem of shrinking process technologies beyond that of the capabilities of the immersion-lithography technology currently in use.

That technology is not only hitting the wall due to simple optical physics – at 193 nanometers, immersion lithography's light beams are of a far larger wavelength than EUV's 13.5nm – but also due to the high cost of the multiple-mask techniques required to shrink feature sizes any further when using immersion lithography.

What a long, strange trip EUV has been

EUV was once the darling of semiconductor futurists – Intel's Mulloy tells us that he remembers when the EUV LLC was first formed in 1997. Now? Not so much.

Back around the turn of the millennium, IBM joined Intel's Extreme Ultra Violet consortium, with the goal of spending "the best part of $1bn" to create sub-0.1 micron chips that could reach speeds of 10GHz by 2005 or so, The Reg reported at the time. Needless to say, it didn't happen.

In 2004, Intel made a $20m investment in EUV development being conducted by Cymer, a company acquired by ASML in 2012. "Accelerating EUV technology development to enable its successful implementation in high volume manufacturing for the 32nm node in 2009 is a critical mission at Intel," said Intel Fellow Peter Silverman of that investment.

Optimism about EUV, however, was already fading by 2008, when EUV wasn't yet working well enough to make its use cost-effective. IBM led the way in seeking other methods for process shrinkage, employing immersion lithography to get down to 45 nanometers and below.

Things weren't much better the following year, when Intel VP of technology and manufacturing Mike Mayberry told The Reg that EUV was still lagging behind schedule, and that delay in the creation of development tools for it would "put production in the 2012, 2013 time frame."

But Mayberry freely admitted that those dates were uncertain. "If you went out and asked 20 people," he said, "you'd get probably 25 different opinions on when that would be."

In 2010, GlobalFoundries SVP for technology and R&D Gregg Bartlett told attendees at a chip-baking conference that 193nm immersion lithography was approaching a brick wall, and that his company was still betting on EUV. "We really do see EUV squarely in our technology roadmap," he said, adding that volume production of EUV-etched wafers was planned for 2014 or 2015.

At the following year's Hot Chips conference, however, ARM CEO Simon Segars was less sanguine about EUV's future. Noting that some industry folk were beginning to think that EUV was a bust, he said, "If that's the case, then, frankly we're not quite sure what we're going to do."

What to do?! What to do?!

Understandably, the semiconductor industry wasn't about to simply throw up its hands in despair. Alternative etching solutions were being investigated, such as maskless electron-beam etching.

When Intel popped $1bn into ASML's coffers in 2012, followed a month later by TSMC adding another $1.4bn, one couldn't but wonder if they weren't throwing good money after bad.

Even Intel was concerned. As then-CTO Justin Rattner told The Reg in May 2013, "I think it's the case we're going to reach a point before the end of the decade where in the absence of a reliable EUV lithography technology that we're going to have trouble dealing in the next critical dimension."

GlobalFoundries CEO Ajit Manocha was also concerned. Speaking at SEMICON West 2013 in May of last year, he sighed, "EUV. This is a highly debated topic. We talk about this all the time. We all know that EUV is late."

At the same conference, Laurent Miller, CEO of Leti, the nanotechnologies arm of the French research-and-technology organization CEA, was more direct. "I'm not working on EUV at all," he said. "Absolutely not, because I don't believe in it." Miller said his research was focussed on electron-beam etching and directed self-assembly.

And now Intel confirms that some of its researchers are joining in the effort to determine if DSA might provide a way out of what's looking increasingly possible to be an EUV dead end.

Not that Intel is giving up on EUV just yet, however – it's merely hedging its bets. "Intel will continue Moore's Law and is committed to doing so independently of litho suppliers' roadmaps," Mulloy told us. "Future options include multiple patterning, as well as other technologies under development within the industry, of which EUV is the most prominent."

Despite those sidebar investigations, he told us, "Intel has been and will continue to be a strong supporter of EUV. EUV will be deployed if and when it is ready and cost-effective."

Mulloy assured us that a lot of progress has been made in the many years of EUV's development, "but challenges remain."

Challenges such as ASML's first production-ready EUV scanner having its guts fried by a malfunctioning laser at the end of last month. As of this Monday, when TSMC's Chen was speaking at the SPIE conference, it had yet to be repaired.

"The tool is still down," he said. ®

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