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The great ultraviolet hope that will enable Intel to break the 10nm chip geometry barrier is further away than ever, the vendor’s CTO has admitted, raising the spectre of Moore’s Law* running out of steam.

The breakthrough revolves around the distance between the circuit-lines chipmakers can etch onto the surface of a computer processor. With the advent of extreme ultraviolet lithography (EUVL), the processor industry said it would be able to etch lines on silicon much closer together than ever before. That was over a decade ago...

Justin Rattner, speaking to The Register in Dublin last week, confirmed that over 12 years after the processor industry first started flagging EUVL as the next big thing, the technology is still somewhere over the rainbow.

Intel and its partners were talking up EUV lithography way back in 2001, pitching the technology as a crucial element in the drive to etch chip components at ever smaller geometries using light at wavelengths shorter than the optical spectrum.

Back then EUV was seen as part of the roadmap to get parts down to 32nm.

As recently as 2009, the vendor was talking about EUV enabling it to cost-effectively go smaller than 32nm, with production possibly kicking in this year. As of today, the vendor is happily popping out chips at 22 nanometers using refinements of existing lithographical technologies.

While manufacturing processes and components are not part of his CTO remit, Rattner last week seemed to suggest EUV-based chip manufacturing was as far away as ever.

“I think the issue right now with EUV is...trying to come up with the light sources of sufficient brightness that they don’t reduce throughput to a significant degree. That’s the big fear. That the light sources won’t be bright enough, throughput will go down, costs will go up, it just won’t be attractive.”

The problem is not a purely academic one, according to Rattner. “I think it's the case we’re going to reach a point before the end of the decade where in the absence of a reliable EUV lithography technology that we’re going to have trouble dealing in the next critical dimension.

“It’s a necessary technology. We’re OK at 22(nm), we’re OK at 14, we’ll probably get to 10. Then maybe it's going to get tougher,” he said.

Asked if the jump constituted a threat to Moore’s law - the off-the-cuff quip that has become the benchmark for measuring Intel’s technological progress - Rattner replied: “Oh sure. Absolutely.”

In the meantime, Intel seems set to deploy its habitual get-out-of-jail card - throwing ever more transistors at the problem.

“This is the perfect example of necessity being the mother of invention,” said Rattner. “So what has allowed us to continue patterning... is the advent of computational lithography and these phase shift masks and the fact that we’re able to computationally determine the correction necessary for the mask to actually result in the pattern at the wafer level.”

Now, he said, people were talking about deploying “multiple masks per step”.

“If the light sources don’t materialise I’m sure we can throw more computing power. I don’t know how many, if any, other manufacturing processes are out there that depend so critically on high performance computing. The creation of these masks is just a function of pure compute power.” ®

* Chip daddy Carver Mead coined the phrase, which refers to a 1965 paper written by Intel co-founder Gordon Moore. Simply put, it projects that the number of transistors on integrated circuits - and ultimately processing speed - doubles approximately every two years. The law is loosely used by the semiconductor industry to plot R&D targets.

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