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Toshiba boffins claim battery life boost with SRAM tweaks

Standby power consumption reduction of 85 PER CENT in tests

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Japanese electronics giant Toshiba claims to have found a technology solution to the perennial problem of mobile device battery life, offering a reduction in standby power consumption of up to 85 per cent.

Announced at the 2013 International Solid-State Circuit Conference in San Francisco last week, the innovation in embedded static random access memory (SRAM) can reduce active and standby power consumption in conditions ranging from room temp to high temperature, the firm said.

Toshiba explained the following:

Longer battery life requires lower power consumption in both high performance and low performance modes (MP3 decoding, background processing, etc). As low performance applications require only tens of MHz operation, SRAM temperature remains around RT [room temperature], where active and leakage power consumptions are comparable. Given this, the key issue is to reduce active and standby power from HT [high temperature] to RT.

The key to reducing power consumption lies in Toshiba’s use of a bit line power calculator (BLPC) and a digitally controllable retention circuit (DCRC).

The BLPC helps to predict how much power the system will need by using replicated bit lines to monitor the frequency of the ring oscillator, and minimises the active power of SRAM “in certain conditions”, said the firm.

The DCRC, meanwhile, is able to take a big chunk out of standby power consumption by waking up from time to time to update the buffer size of the retention driver.

The techniques have enabled power consumption at 25C to be reduced by 27 per cent (active) and 85 per cent (standby) in prototype tests.

Toshiba said the low-power tech would be perfectly suited for smartphones and other mobile devices, but gave no indication when it would be available commercially. ®

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