Intel to etch 22nm Xeons and Atoms in 2013
A Sandy Bridge-EX too far, Poulson Itanium looming
IDF 2012 The details are still a bit sketchy, but Intel is committed to get the rest of the "Ivy Bridge" family of Xeon processors out the door next year, is getting ready to roll out new Itanium and Atom processors for servers this year, and is working on future Xeon E3 and Atom processors for microservers next year, too.
So says Diane Bryant, general manager of the Data Center and Connected Systems Group, which makes chips for servers, storage arrays, and networking gear as well as controlling a number of interconnects Intel has acquired in the past year.
As in years gone by, Intel is starting at the bottom and working its way up through server form factors rather than try to get all of the Ivy Bridge Xeon variants out the door at the same time.
The Xeon E3-1200 v2 processors launched in May were the first Ivy Bridge server chips to come out. In fact, they debuted beside the "Sandy Bridge" Xeon E5-2400 processors for low-cost two-socket machines and the Xeon E5-4600 processors for four-sockets. The workhorse Xeon E5-2600 processors debuted back in March, which has been the traditional time for the two-socket server launch from for the past three years.
But don't get used to that cadence.
Intel really wanted to get the Xeon E5-2600s out the door last fall, and even managed to ship a bunch to supercomputer customers under NDA. And with the Xeon E5-2600s only just beginning to ship in volume during the early summer and Intel not under a huge performance or price/performance threat from AMD, you can bet that Chipzilla will try to sell those Xeon E5-2400, E5-2600, and E5-4600 processors as long as possible, and let that 22-nanometer process used for Ivy Bridge mature even more and thereby increase its profits – or at least maintain them relative to the very mature 32-nanometer process used to etch this generation of Sandy Bridge E5 chips.
During a presentation at Intel Developer Forum in San Francisco on Tuesday, Bryant went over the cloud, HPC, and big data markets that Intel is trying to tap into with its Xeon and Atom server chips, and gave a few details on forthcoming processors in lieu of actual server chip announcements.
However, if you were expecting the eight-core "Poulson" Itanium 9500, the twelve-core "Sandy-Bridge-EX" Xeon E7, or the dual-core "Centerton" Atom to be announced at IDF this week, you were no doubt disappointed.
In fact, there isn't going to be a Sandy Bridge-EX part, Bryant confirmed to El Reg in an interview. The development and qualification cycles for the E7 class of machines is much longer than for the two-socket boxes, and once you get this late into the year, vendors are hesitant to try to introduce a new box that would next year be superseded relatively quickly by an "Ivy Bridge-EX" chip.
"At some point, you have to snap back and get back into the cadence," explained Bryant.
As El Reg reported back in May 2011, the Intel plan originally called for the Sandy Bridge-EP, which scales up to four sockets, and the Sandy Bridge-EX, which scales up to eight sockets – or higher with extended chipsets created by the server makers themselves, if they get around to doing it – to plunk into the Socket-R or LGA2011 socket that is one of the sockets supported by the "Romley" server platform and the "Patsburg" C600 chipset.
There was no four-socket Sandy Bridge-EP way back when, but Intel decided (and we think correctly) that a lower-cost four-socket machine based on the E5-4600 was a better option than a full-on Sandy Bridge-EX for many workloads.
The plans also originally called for the new "Brickland" platform and the Ivy Bridge-EX chips to be used in machines with two, four, or eight sockets, much as the ten-core "Westmere-EX" E7-2800, E7-4800, and E7-8800 series are today.
Intel is cooking up "Ivy Bridge" Xeon E5 and E7 processors for next year
Now, as Bryant revealed on Tuesday, Intel is going to jump straight to the Ivy Bridge-EX chip next year at the high end of the server-chip lineup with the Tri-Gate 22-nanometer processes that all of the Ivy Bridge family uses. Intel is skipping a "tock" in its tick-tock model here with the Xeon E7.
The pattern preferred by Intel is to create a new architecture in an existing process (that's the tick) and then refine the architecture a little and introduce it in a new process (that's the tock), keeping to an annual cadence for new processors. The future "Haswell" Xeons will be a tock, and will start at the low-end in servers with the Xeon E3s.
Bryant said that Intel is sampling both the Ivy Bridge E5 and E7 chips now and that they would be in production next year in the 22-nanometer processes. This being a tock, they will also be compatible with existing Sandy Bridge E5 platforms.
In addition, it could just turn out that the Ivy Bridge Xeon E7 sports a new socket that might, just maybe, be compatible with a future "Kittson" Itanium processor due way down the road in maybe 2014. Bryant said that Intel was still working towards a common Itanium-Xeon socket at the high-end of the server racket, but would not divulge which generations of processors would slide into that common socket or what it might look like.
What Bryant did say is that the Ivy Bridge Xeon E5 and E7 chips would sport a new feature called APICv, a tweak of its Advanced Programmable Interrupt Controller implemented in SMP server processors that does interrupt processing across multiple chip sockets.
One of the big overheads in a virtual environment is is entering and exiting the hypervisor and processing the interrupts to the processor. The APICv feature is intended to be hypervisor-friendly and will reduce exit interrupts by 50 per cent, according to Bryant, reducing the overhead of the hypervisor and therefore of using server virtualization.
The future Xeon E7 part will also have two new features called Secure Key and OS Guard to beef up the security on servers, which made their debut on Ivy Bridge desktop and laptop processors earlier this year and which make the platform more secure from malware attacks.
Intel is also working on new Xeon E3 and Atom processors aimed predominantly at the microserver space for next year, as you can see:
The next revs of the Xeon E3 and Atom server chips
At the conference, Intel revealed that the dual-core "Centerton" server processor for microservers will be called the Atom S-Series, and reiterated that it will ship in the fourth quarter.
The Atom S-Series is a system-on-chip design that includes everything but the main memory and network interconnect on the die that you need in a baby system. It will have 64-bit processing and memory addressing, VT-x virtualization support, HyperThreading, and error correction and scrubbing on main memory – as all server processors should have. The Atom S-Series will be certified to run server variants of Linux and Windows, all in a 6 watt power budget and implemented in a 22-nanometer process.
Next year, look for the "Haswell" Xeon E3s to come out on 22-nanometer processes, offering more performance and less power draw and heat dissipation than the current four-core 45 watt and two-core 17 watt Ivy Bridge Xeon E5 parts.
Bryant also disclosed that next year will see a tock on the Atom S-Series chips, with the "Avoton" chips. Not much is known about these chips except that they will also include networking on the die. And, as it turns out, that will be an Ethernet controller of some type, not a full-on switch based on the Fulcrum ASICs that Intel bought when it acquired Fulcrum Microsystems last year.
That leaves the Poulson Itanium 9500s, which Bryant did not discuss in her presentation at IDF, but she did confirm to El Reg that Poulson "is coming later this year" and that "all is good there."
Which will no doubt be a great relief to HP and its HP-UX, NonStop, and OpenVMS customers. ®
Sponsored: Hyper-scale data management