Boffins baking big-data single chip architecture
Graphene, electrons and the end of 'conventional silicon electronics'
Some use software – caching, in-memory transactions or BigTable-style algorithms to cluster and control groups of servers. For others, the answer lies in the hardware: packing more cores into chips or making the transistors faster. Both schools are looking for ways to make applications, computers and servers capable of processing big volumes of data without cramping up.
US university researchers reckon these techniques have had their day, however, and have turned to nano electronics for the answer.
A team led by scientists from the University of California have returned to electrical engineering fundamentals with work that will produce a chip combining memory and logic. Only this will overcome what they call the “ultimate limits” of conventional silicon electronics the others are trying to circumvent. Today, you have memory in RAM and logic in the CPU connected by a bus that causes a bottleneck as instructions are relayed.
Their goal is to construct a functioning magnetologic gate that will be the building block of the new chip architecture and become the main element of a circuit.
The idea is to emulate the transistor, which paved the way for the integrated circuit and microprocessor – foundation stones of today's computers. The magnetologic gate will be used on circuits in intensive applications like search, data compression and image recognition.
The physics and astronomy – yes, astronomy – professor leading the project is Roland Kawakami, who told The Reg in an interview he reckons the magnetologic gate is just three years away from becoming reality.
“It’s completely rethinking how you do computing,” Kawakami told us. “We are in a crawling phase [now]. It’s similar to back 50 years ago, when they invented the transistor and they needed that one device. That’s the same for us.”
He’s been working on the ideas around this since 2010. His research spun out of work for DARPA, but about six months ago the project went live and landed a helpful $1.85m grant from the National Science Foundation and the Nanoelectronics Research Initiative whose members include IBM, Intel, AMD and Texas Instruments. The cash will fund 14 researchers and experts on five campuses. Kawakami is at UC Riverside and he will be joined by researchers at the University of California Irvine and the University of California San Diego as well as two universities in New York State whose expertise spans magnetoresistive memory, theoretical physics, circuit design, and constructing integrated circuits.
At the heart of the project is graphene, the wonder material that became popular in 2010 following the Physics Nobel prize-winning work of the scientists who discovered it: the University of Manchester’s Andre Geim and Kostya Novoselov. Graphene has opened up new doors because it's super lightweight, thin and capable of conducting electricity.
The magnetologic gate uses a set of magnetic electrodes that are connected via graphene. Binary data is stored in the electrodes' magnetic state (ie: north and south produce zeros and ones respectively), while the logic is determined from the electron's spin state in the graphene.
Electrons and graphene were made for each other, as the former moves through the latter faster than it does through silicon – at 1/300th the speed of light, about 10 times as fast as electrons in conventional silicon devices – while its polarisation rate increases 30 per cent when compared to regular semiconductors.
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