AMD plots an end run round Intel with SeaMicro's 'Freedom'
Can clouds and virt move the battle off the chip?
Analysis As last week was winding down, Advanced Micro Devices took control of upstart server maker SeaMicro, and guess what? AMD is still not getting into the box building business, even if it does support SeaMicro's customers for the foreseeable future out of necessity.
Further: Even if AMD doesn't have aspirations to build boxes, the company may be poised to shake up the server racket as a component supplier. Perhaps not as dramatically as it did with the launch of the Opteron chips nearly a decade ago, but then again, maybe as much or more - depending on how AMD plays it and Intel and other server processor makers react.
AMD announced its intent to acquire SeaMicro back on February 29, and the deal was consummated on Friday (March 23) with $293m in cash and AMD's assumption of nearly 6.5 million shares of its own stock and the issuance of another 322,000 shares of restricted AMD stock. All told, AMD shelled out $334m to get its hands on SeaMicro, and perhaps more importantly, to get its hands on the 3D torus interconnect and other electronic features at the heart of the SM10000 family of servers.
The SeaMicro chassis can hold 64 processor cards – 32 up one side and 32 down the other – as well as a slew of disks and network ports to the outside world. The genius of the design is not that it crams a bunch of Atom or Xeon servers on these baby PC server cards, which hook into the system backplane through PCI-Express x16 slots, but rather all of the sophisticated gadgetry that links the servers together and allows for each server card to have nothing but processor sockets, chipsets, and memory slots.
AMD is already feeling quite proprietary about the SeaMicro server interconnect, which was called "Freedom" internally at SeaMicro and which will no doubt get a properly boring name if the AMD marketeers have anything to day about it. (Opticonnect is already owned by IBM, so forget that one, but Opterlink or HyperNetwork might be interesting possibilities.)
"Our unique fabric technology is truly one of the crown jewels of the cloud," said Lisa Su, senior vice president and general manager of Global Business Units at AMD, in a statement. "The combination of this innovative technology with our processor design expertise greatly enhances our ability to attack the fastest growing portion of the server market with industry-leading low-power, low-cost, high-bandwidth solutions."
AMD's "Freedom" interconnect
The Freedom interconnect has 1.28Tb/sec of aggregate bandwidth on that 3D torus, the same as the prior generation. It supports up to 16 external 10 Gigabit Ethernet links or 64 external Gigabit Ethernet links to the world outside of the 10U chassis in the SM10000 machine. The chassis can currently support 64 quad-core Xeon processors from Intel or 384 dual-core Atom processors from Intel; in both cases, the SeaMicro designs use single-socket processors only.
That torus interconnect doesn't just link the server nodes to the disk and networking I/O in the chassis. It also virtualizes access to I/O in the system so you can reconfigure capacity allocations of that 1.28Tb/sec of bandwidth to different nodes inside the system. The system also has a field programmable gate array (FPGA) to do load balancing across all server nodes, and these circuits are hooked into the SM10000's system management tools to allow for pools of servers to be grouped together and managed as a single object and to provide guaranteed performance levels for groups of processors, disk, memory, and fabric. This feature is called Dynamic Compute Allocation Technology, or DCAT. The SeaMicro chassis supports up to 64 SATA disk or solid state drives.
With the Freedom interconnect, SeaMicro added an interesting feature called TIO, which is short for Turn It Off. SeaMicro has hacked functions into the interconnect that can reach into the Intel C200 chipset and the Xeon E3 chip and turn off all the stuff that a SeaMicro server node does not need. With the Freedom interconnect virtualizing the disk I/O, the C200 chipset doesn't need to power up its SATA interface or its USB ports; it also tells the HD 2000 graphics controller on the Xeon E3 to shut up and shut down.
Why the SeaMicro play?
If it is not completely obvious by now, AMD and its foundry partners, GlobalFoundries and Taiwan Semiconductor Manufacturing Corp, are never going to catch up to Intel in the chip process arms race. Intel has anywhere from a full node to two full nodes of process lead on these companies, depending on the when you look at it over the past several years and looking ahead a few years into the future. AMD's new management correctly sees that it cannot win a chip process war.
Look at what Intel does. With every process shrink, it can cram more stuff onto the chip. A long time ago – it seems like ancient history now – we were happy with a single core on a die, and then we started integrating various levels of cache memory and cache controllers onto the chips to goose performance. Then came multiple cores and main memory controllers, virtualization circuits, and in the latest Xeon E5-2600 processors, there is a very sophisticated ring interconnect that lashes cores, cache memories, QuickPath Interconnect for gluing together multiple processors, and the whole I/O subsystem (including PCI-Express controllers) onto the die. How long before there will be integrated Ethernet and InfiniBand ports on the Xeon chips – or better still, a single network interface controller than can speak either?
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