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Oracle and Fujitsu hook up on Sparc servers

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Software giant and server newbie Oracle and IT conglomerate and long-time Sparc partner Fujitsu said late Tuesday that they have extended their collaboration on Sparc platforms.

The announcement was short on details, particularly any relating to the chips that would be used in the future Sparc Enterprise M machines. It also raises more questions than it answers.

"Oracle and Fujitsu have also made available a roadmap of M-series servers that provides 15 times better performance in the next three years," the Oracle and Fujitsu statement said. "These new developments will further ensure these milestones are met."

Presumably, Oracle and Fujitsu were sure when the roadmaps were disclosed last summer. It's not clear what in the extended collaboration makes them more sure. But if I had to guess, it is that Fujitsu and Oracle have committed to using the eight-core Venus Sparc64-IIIfx processor in some tweaked form in the Sparc Enterprise M machines.

Under the collaboration, Oracle and Fujitsu "will advance joint engineering efforts" that make sure that products from both companies are optimized and tested to "best run Oracle software in mission critical environments." It is not clear if this only means Sparc-based systems. Fujitsu sells x64-based Primergy servers that are perfectly capable of running Solaris 10 and 11 or Oracle Enterprise Linux 5 and 6.

The announcement added that Oracle and Fujitsu were aligning their sales forces to jointly sell Sparc Enterprise servers – presumably both T and M series, but they did not say – and that Fujitsu has inked a new Oracle PartnerNetwork distribution agreement allowing it to resell and distribute the full portfolio of Oracle products and to act as a system integrator and solution provider for the "overall Oracle stack."

Oracle's PR people were working to answer some of our questions, and hopefully we can eventually shed more light on the situation. In the meantime, let's talk about what Oracle and Fujitsu this new agreement might mean.

As El Reg reported back in early December, Oracle's CEO Larry Ellison outted the eight-core Sparc T4, due later this year and perhaps running in the range of 3GHz or so based on our second analysis a few weeks after Ellison spoke about the chip. At the time that Ellison outted the Sparc T4, Oracle and Fujitsu rolled out a Sparc64-VII+ chip, developed under the code-name Jupiter-E by Fujitsu, but called the M3 by Ellison. This chip runs at 3GHz, has four cores with two threads each, and 12MB of shared L2 cache for the cores.

Since last fall, Oracle has been showing off a roadmap for the T and M series processors, which is shown below:

Oracle Sparc Roadmap

Oracle Sparc processor and system roadmap (click to enlarge)

If the M3 is the chip that was rolled out in late 2010, then the M4 must be the processor due around the middle of 2012 in machines with 8 to 64 sockets. To get six times the throughput and 1.5 times the "single-strand" performance on the M4 (presumably compared to the quad-core 2.5 GHz Sparc64-VII, which was announced in 2008 and which we call the M2), you're talking about pushing the clocks up to around 3.75GHz on that future M4 chip. If the baseline is the dual-core Sparc64-VI, then the M4 runs at 3.6GHz.

It is almost certain that the M4 is indeed a commercialized Venus chip with its clocks cranked up considerably. The eight-core Venus chip used in the 10 petaflops Project Keisoku supercomputer being built by the Japanese government for delivery in 2012 runs at 2GHz and only dissipates 58 watts. Cranking the clocks up to somewhere north of 3.5GHz could give a big performance boost and would put the Venus chip in the same thermal range as IBM's and Intel's fattest Power7 and Xeon EX processors. It would also give that rough 6X multiple in raw system throughput (twice the cores from four to eight and a 1.5X speed bump) that is on the Oracle Sparc roadmap. By the way, that assumes the Venus chip does not have multiple threads per core.

The M5 processors and their related machines, due in late 2013 and early 2014 based on that roadmap, are again going to double throughput – but not by adding sockets (the machines are still at 8 to 64 sockets) and not by cranking up clocks (Oracle would have said so). That means the two companies are going to add more cores or threads or both.

My guess is threads, because it takes the least design work and fits in best with Oracle's thread-hungry middleware and database software. And if the Venus/M4 chip doesn't have multithreading (as it may not – Fujitsu has not said), then adding threads to it with the M5 generation is the simplest way to double the throughput and do the least amount of work, seeing as how Oracle and Fujitsu have lots of experience with adding threads to chips.

But if you do the 20 per cent bump with the M3 chips, 6X throughput bump with the M4, and 2X bump with the M5, that gets you a factor of 14.4X improvement of performance. That's close enough to the 15X Oracle and Fujitsu were talking about in their announcement on Tuesday.

Heaven only knows what the Sparc processors in the 2014-2015 machines are in the system roadmap. All that Oracle has promised is another 1.5X boost in clock speed and another 2X boost in throughput. That should put the clock speed of the Sparc chip somewhere in the range of 5GHz to 5.5GHz, which is not impossible as long as you want to burn 150 to 200 watts per chip and you can get the wafer-baking processes shrunk enough.

Jumping from eight to ten cores and boosting the clock speeds by a little more than a factor of 1.5X gets you 2X the throughput. So maybe that is an M6 chip and there are no more Sparc T series chips? Or maybe it is a T6 chip and there is no more M series processors? Or maybe this is a new converged T/M chip that brings the best of both architectures together? (You could even call it Tim, for short. I'm just saying...)

If any of this is the case, the simple question is this: why don't Oracle and Fujitsu just come out and say it?

Well, given the slippery nature of the UltraSparc and Sparc64 roadmaps, with so many delays and product deaths in the past decade, I guess I can understand why. That said, Itanium and Power have done no better. Intel's Itanium has driven off its roadmaps many times, and IBM only vaguely talks about the future – like Oracle and Fujitsu – and so you can't get a sense of where its disappointments have been.

But I can tell you for certain that the Power4+, Power5+, and Power6+ processors were all late and did not live up to expectations, just like so many generations of Itanium and Sparc chips. ®

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