Feeds

Self-correcting memory arrives at last

Sadly we speak here of NAND Flash, not one's brain

Next gen security for virtualised datacentres

Micron is putting error correction code (ECC) in its NAND chips to combat increased error rates as NAND process sizes shrink.

The company says that as NAND process sizes decrease to 20nm and then become even smaller, the bit error rates will rise, requiring NAND controllers in mobile phones and other flash-using devices to devote more processor cycles to detecting and recovering from errors.

It has developed ClearNAND technology which puts ECC functionality into the NAND chips and relieves the host processor of much ECC work. The first implementation is with Micron's 25nm multi-level cell (MLC) NAND products and comes in two versions.

Standard ClearNAND comes with the 8GB - 32GB chips, which are targeted at consumer electronic devices like portable media players. An Enhanced ClearNAND option is said by Micron to add specific but unidentified features to increase performance and reliability for high-capacity designs in enterprise and other computing applications.

We should think – or so El Reg supposes – of storage array solid state drive (SSD) tiers, banks of server cache and that sort of thing [Quite so - Ed]. Micron is making this available for its 16GB - 64GB products. NAND chips using both versions still have what Micron calls a traditional raw NAND interface.

Micron is expected to announce a process shrink down to the 20nm level in the next few months.

We could well imagine that on-chip ECC will become more important as 2-bit MLC progresses to 3- and 4-bit MLC where the number of cells and process shrinks could combine to increase the bit error rate substantially. Affordability, performance, reliability and endurance are going to be key to the acceptance of 2-, 3- and 4-bit MLC in flash-using devices and Micron has just added a reliability enhancement to its MLC products. Expect its competitors to follow suit. ®

5 things you didn’t know about cloud backup

More from The Register

next story
The Return of BSOD: Does ANYONE trust Microsoft patches?
Sysadmins, you're either fighting fires or seen as incompetents now
Oracle reveals 32-core, 10 BEEELLION-transistor SPARC M7
New chip scales to 1024 cores, 8192 threads 64 TB RAM, at speeds over 3.6GHz
Docker kicks KVM's butt in IBM tests
Big Blue finds containers are speedy, but may not have much room to improve
US regulators OK sale of IBM's x86 server biz to Lenovo
Now all that remains is for gov't offices to ban the boxes
Gartner's Special Report: Should you believe the hype?
Enough hot air to carry a balloon to the Moon
Flash could be CHEAPER than SAS DISK? Come off it, NetApp
Stats analysis reckons we'll hit that point in just three years
Dell The Man shrieks: 'We've got a Bitcoin order, we've got a Bitcoin order'
$50k of PowerEdge servers? That'll be 85 coins in digi-dosh
prev story

Whitepapers

Endpoint data privacy in the cloud is easier than you think
Innovations in encryption and storage resolve issues of data privacy and key requirements for companies to look for in a solution.
Implementing global e-invoicing with guaranteed legal certainty
Explaining the role local tax compliance plays in successful supply chain management and e-business and how leading global brands are addressing this.
Top 8 considerations to enable and simplify mobility
In this whitepaper learn how to successfully add mobile capabilities simply and cost effectively.
Solving today's distributed Big Data backup challenges
Enable IT efficiency and allow a firm to access and reuse corporate information for competitive advantage, ultimately changing business outcomes.
Reg Reader Research: SaaS based Email and Office Productivity Tools
Read this Reg reader report which provides advice and guidance for SMBs towards the use of SaaS based email and Office productivity tools.