Feeds

AMD chip chief: 'one day, microprocessor skyscrapers'

Seductive stacked hotness

Build a business case: developing custom apps

Although today's processors are all residents of Flatland, AMD's head chippery honcho says that multi-level, multi-core processors may be the wave of the future.

"I'm not saying it's an easy dimension, the third dimension," AMD's senior vice president and headman of the company's Technology Group Chekib Akrout cautioned The Reg when we sat down with him at his company's analysts day in Sunnyvale, California.

But although stacking chip upon chip upon chip has its challenges, "There's nothing really to stop you from that. But now you may end up thinking very differently," Akrout told us.

The advantages of chip-stacking should be apparent to anyone who has pondered moving data among multiple cores and multiple caches: the closer the processor elements, the swifter such data transfer can occur.

Data transfer over a ring bus — such as is used in Intel's upcoming Sandy Bridge microarchitecture — has the advantage of being highly scalable, able to allow processor designers to easily add more cores. But Akrout isn't a big fan of rings, citing their inherent latency problems.

"When you start working on a ring, you pay a penalty," Akrout said. "It's a nice way to optimize a bus," he told us, "but then you have to understand the tradeoff in performance, how does it work, because your latency is getting longer and longer" when far-flung elements need to communicate with one another.

When asked about how he plans to handle the bus challenges imposed by high core-count chips, Akrout said: "I may go to a fabric or a crossbar before I go to a ring."

In a fabric's point-to-point on-chip communcation scenario, each element can communicate with each other element directly — they're all directly connected, so you can get from one element to another "in one shot," Akrout said.

When asked if such a complex web of commuication channels would require a significant amount of silicon real estate in, say, a 64-core chip, Akrout answered: "Sure, you will pay, but it doesn't mean its still the worst scenario," he said, but added "We're not talking about using half of the chip."

And so one part of the inter-core, inter-cache communication solution might be an arrangement that stacks core upon core. Doing so, however, would increase one major problem all chip designers face even here in Flatland: heat.

According to Akrout, to enable designers to figure out how to beat the heat in multi-level chips, "You need to understand how the thermal behaves, to do that. Which means you need to have tools and simulations capability to see 'Where are the hot spots, and how are you going to handle that stacking?' Because if you know, then you figure out how to manage it."

Simply taking existing chips and stacking them one upon another wouldn't be feasible, seeing as how different areas of chips tend to have different thermal characteristics. Taking two existing chips and simply sticking one on top of the other would be as absurd as taking two single story homes and stacking them — the bottom one would collapse, since it wasn't designed for that purpose.

To illustrated how cores in a stacked chip might be designed, Akrout drew one possible two-layer scenario in the air with his hands, saying: "You may have the integer unit here, the integer unit there, the cache on one side for this guy, the cache on the other side for this guy."

Another possibilty in a stacked-chip scenario might be two computer cores separated by a layer or more of DRAM, seeing as how memory's lower thermal charachteristics could act as a sort of insulator between two toasty cores.

And then, of course, we're back to the question of how all the elements would communicate with one another — but from Akrout's comments, it appears that a ring bus isn't high on his list of possibilities.

Although, he mused, "All these busses have pros and cons." ®

Build a business case: developing custom apps

More from The Register

next story
Kate Bush: Don't make me HAVE CONTACT with your iPHONE
Can't face sea of wobbling fondle implements. What happened to lighters, eh?
The agony and ecstasy of SteamOS: WHERE ARE MY GAMES?
And yes it does need a fat HDD (or SSD, it's cool with either)
Apple takes blade to 13-inch MacBook Pro with Retina display
Shaves price, not screen on mid-2014 model
iPhone 6 flip tip slips in Aussie's clip: Apple's 'reversible USB' leaks
New plug not compatible with official Type-C, according to fresh rumors
Steve Jobs had BETTER BALLS than Atari, says Apple mouse designer
Xerox? Pff, not even in the same league as His Jobsiness
TV transport tech, part 1: From server to sofa at the touch of a button
You won't believe how much goes into today's telly tech
Apple analyst: fruity firm set to shift 75 million iPhones
We'll have some of whatever he's having please
Apple to build WORLD'S BIGGEST iStore in Dubai
It's not the size of your shiny-shiny...
prev story

Whitepapers

Implementing global e-invoicing with guaranteed legal certainty
Explaining the role local tax compliance plays in successful supply chain management and e-business and how leading global brands are addressing this.
Top 10 endpoint backup mistakes
Avoid the ten endpoint backup mistakes to ensure that your critical corporate data is protected and end user productivity is improved.
Top 8 considerations to enable and simplify mobility
In this whitepaper learn how to successfully add mobile capabilities simply and cost effectively.
Rethinking backup and recovery in the modern data center
Combining intelligence, operational analytics, and automation to enable efficient, data-driven IT organizations using the HP ABR approach.
Reg Reader Research: SaaS based Email and Office Productivity Tools
Read this Reg reader report which provides advice and guidance for SMBs towards the use of SaaS based email and Office productivity tools.