New super-Flash chips to run on SiOx, not graphite
'They said I was mad! But they'll all be very sorry'
Stateside chip boffins say they have developed a radical new method of building memory, which will smash through the "brick wall" that Moore's Law is about to run into.
The underlying technique was thought to be dependent on the use of graphite, but in fact this has now been shown to be untrue. A plucky grad student studying at Rice university, Jun Yao, was convinced that the tiny nanometre-scale devices built in the lab didn't need carbon at all.
"It was a really difficult time for me, because people didn't believe it," says Yao. Yao's results indicated that in fact ordinary silicon oxide could be used to make and break connections.
"It doesn't matter how many people don't believe it," says Yao, grimly. "What matters is whether it's true or not."
"Other group members didn't believe him," confirms Professor James Tour, in charge of the lab. The prof adds that nobody recognized silicon oxide's potential, even though it's "the most-studied material in human history".
"Most people, when they saw this effect, would say, 'Oh, we had silicon-oxide breakdown,' and they throw it out," says Tour. "It was just sitting there waiting to be exploited."
Essentially the new device works by sandwiching non-conductive silicon oxide between sheets of polycrystalline silicon, which serve as the electrodes. Applying a charge to the electrodes creates a conductive pathway by stripping oxygen atoms from the silicon oxide and forming a chain of nano-sized silicon crystals. Once formed, the chain can be repeatedly broken and reconnected by applying a pulse of varying voltage.
This method should allow the construction of chip circuitry as small as five nanometres wide. As an added benefit, it will allow creation of switches or memory bits with only two pathways - rather than three, as seen in current flash memory.
"Manufacturers feel they can get pathways down to 10 nanometers. Flash memory is going to hit a brick wall at about 20 nanometers. But how do we get beyond that? Well, our technique is perfectly suited for sub-10-nanometer circuits," says Tour.
Furthermore, Yao's kit can easily be stacked to make 3-D, super dense information storage.
"I've been told by industry that if you're not in the 3-D memory business in four years, you're not going to be in the memory business. This is perfectly suited for that," enthuses Tour.
The researchers claim that their process, now fully understood, offers all the benefits of the previous graphite plan: "high on-off ratios, excellent endurance and fast switching (below 100 nanoseconds)". They add that silicon-oxide devices will also be resistant to the effects of radiation, unlike today's ordinary computers, which should mean strong military interest.
The assembled boffins' paper - lead author Jun Yao - can be read here by subscribers to Nano Letters. ®
Sponsored: DevOps and continuous delivery