AMD's Opteron 4100s march into x64 price war
Battle for the clouds
The big guns are already on the field in the x64 server processor war, and the troops are finally going all in with today's launch by Advanced Micro Devices of its entry "Lisbon" Opteron 4100s.
The Opteron 4100s are similar in many respects to the "Magny-Cours" Opteron 6100s that entered the battle against Intel's "Westmere-EP" Xeon 5600 and "Nehalem-EX" Xeon 7500 processors in March. Both chips are implemented in a 45 nanometer silicon on insulator process and manufactured by GlobalFoundries, the chip foundry that AMD spun out last year.
The Lisbon cores are quite similar to those used in the six-core "Istanbul" Opteron 2400 and 8400 processors from a year ago, with the transistor counts and processor areas being essentially the same, as are the cache memories. The big change is the shift from DDR2 to DDR3 memory for the integrated memory controllers. The Istanbul chips already supported HyperTransport 3 (HT3) point-to-point interconnect links, although the chipsets that the Istanbuls talked to did not. (They had a backwards compatibility mode).
The Magny-Cours chips, which come in variants with eight or twelve cores per socket, basically cram two Lisbon processors side-by-side in a single chip package and slap them into a new G34 socket that is serviced by AMD's own chipsets. The Lisbon chip comes with either four or six cores per socket on a single die. Both AMD processors have 64 KB of L1 data and 64 KB of L1 instruction cache per core, plus 512 KB of L2 cache per core. The Lisbon chip has 6 MB of L3 cache per processor package, and the Magny-Cours, being a double-stuffed socket, has 12 MB of L3 cache per socket.
The Opteron 6100s are aimed at standard platforms that need lots of cores, clocks, and memory to support big databases or server virtualization hypervisors that in turn have lots of virtual machines running atop them. On these machines, raw performance and performance per watt are the two key metrics. Which is why AMD created the Opteron 6100s to support both two-socket and four-socket servers with the same chips and chipset.
Although, if you think about each physical chip as its own processor and look at the HyperTransport links coming into each socket, you could argue that what AMD has really done with the Opteron 6100s is crunch an eight-socket box into four sockets and a four-socket box into two-sockets.
This is a great strategy for customers who pay for their software based on socket count – and if you want to make a cheap four-socket box that can compete against Intel's more expensive Xeon 7500s. These latter chips from Intel have Itanium prices and scalability, but Xeon instruction set compatibility, and AMD figured that by crunching down the socket count on Opteron processors by a factor of two by doubling up the processors for the Opteron 6100s while at the same time creating an inexpensive, low-power server lineup for single- and dual-socket servers using the Opteron 4100s was the best way to undercut both the Xeon 5600s and the Xeon 7500s. The market will decide if this was indeed the right move.
What AMD has said this year, and what is no doubt true, is that it needs to get more market share in the server racket and it has to compete on price and performance to do that. However, it may just be that what many server customers want more than anything now is memory expandability within a 2P or 4P box, and the memory controllers inside the Opteron 4100 and Opteron 6100 processors can't address more than 512 GB, and a number of server OEMs, wanting to catch the server virtualization wave, have put two-socket and four-socket Xeon 7500 machines into the field that address 1 TB or more of memory.
AMD shops will have to wait until next year with the "Bulldozer" cores and their new on-chip memory controller to have the memory addressing for the Opterons be increased beyond 512 GB.
Memory capacity could be a problem for the Opteron 6100s, but it is not really so much of an issue for the Opteron 4100s. These Lisbon chips are aimed at scale-out, web-ish, HPC workloads where the cost per performance per watt, the physical size (smaller is better), and the lowest cost of acquisition and operation for a server node are the most important architectural factors. Because the Lisbon sockets have fewer cores, the clock speeds can be jacked up higher, which means better performance per core on certain kinds of workloads (particularly those doing floating point calculations) compared to the Opteron 6100s.
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