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Intel Labs unveils PC power plans

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Engineers at Intel Labs are toiling away at a "holistic approach" to energy savings that could result in lower-power processors, shrunken power bricks and batteries and worldwide power bills shrinking by billions of dollars.

At a gathering of reporters Thursday in San Francisco, the director of circuits and system research at Intel Labs, Wen-Hann Wang, detailed the efforts of his small band of "world-class" engineers by dividing their focus into three areas: circuits, architecture, and platform.

Circuits: smaller and more resilient

The primary method of increasing a microprocessor's power efficiency has traditionally been to reduce its process size. At 32 nanometers, for example, Intel's recently released "Westmere" Core i7/5/3 processors have a transistor-to-transistor distance that's over 300 times smaller than the 10 micrometer process size of the company's 1971 groundbreaker, the 4004. And that power-saving shrinkage will continue: 22nm processors are expected to begin appearing next year.

But there's more to energy efficiency than mere process shrinkage. For example, Intel's high-k metal gate technology, first announced in late 2003 and first appearing in the 45nm Penryn line in 2007, launched in November 2007, not only allowed for further process shrinkage but also permitted lower threshold voltages.

Low threshold voltages - the minimum amount of juice a processor needs to come alive - are key to energy efficiency. At those low voltages, however, a processor's compute performance is also low - but as Wang pointed out: "Sometimes you don't need a lot of performance, like when you're doing email and a few applications."

Wang's team has a prototype "near threshold voltage" chip that can operate in a wide range of voltages, with compute power increasing as total voltage increases. And when operating near the threshold voltage, they claim to be able to increase energy efficiency by up to 800 per cent.

Unfortunately, when running a chip very near its threshold voltage, the signal-to-noise ratio is tight and errors can creep into the compute stream. In addition, a chip running on the margin will be highly susceptible to voltage droops. Add to that a number of other uncertainties that are present in even higher-voltage, higher compute-power situations, and things get dicey.

To the rescue come "resilient circuits," which Intel detailed at last month's International Solid-State Circuits Conference (ISSCC), and which The Reg covered in some depth here. Wang characterized the philosophy behind resilient circuits by channelling both Meher Baba and Bobby McFerrin: "Don't worry, be happy."

Intel resilient circuits

As an added bonus, resilient circuits remove performance-robbing "guardbands"

Simply put, resilient circuits allow processors to keep tabs on themselves and their error rates, and to swiftly rerun tasks that have generated errors due to variations in supply voltage, temperature changes, or because of transistors that are pooping out due to old age. The compute pipeline can also be momentarily slowed to reduce error rates.

According to Wang, Intel's prototype resilient-circuit silicon can achieve a 37 per cent power savings when compared to conventional circuits, or - when cranked up to higher voltages - can improve throughput by up to 21 per cent.

As an added bonus, adding those extra checks and balances to ensure resiliency has only a nominal effect upon the overall transistor and power budget: "It depends on how agressively you want to correct errors, so there's a range," Wang told The Reg. He claimed the overhead to be between three and five per cent: "It depends on how happy you want to be."

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