Feeds

Intel sneak peeks Westmere EP server silicon

Four and six cores, Turbo Boost, AES

Combat fraud and increase customer satisfaction

With IBM and Intel gearing up the high-end Power7 and "Tukwila" Itanium launches for next Monday, Intel's preview of its "Westmere-EP" processors for servers and workstations and a slew of research projects was always going to get lost in the shuffle.

The preview is set for Monday as the International Solid State Circuits Conference kicks off in San Francisco. But in an apparent effort to prevent the preview from being lost amidst all the talk of the Power7, Intel gave the press a preview pre-brief this morning, showing off the papers it plans to present at the conference.

Chip makers will be chip makers.

Separate from the conference, Intel is also launching the long-overdue quad-core Tukwila Itanium. But that is a separate story, which you can read all about here.

The Westmere-EP chips are kickers to last year's quad-core Nehalem-EP Xeon 5500 processors, which were launched at the end of March 2009 and which have very much helped keep the server business staggering along, somewhat bewildered but not falling completely down, throughout last year. With a shrink to the second generation of Intel's high-k metal gate 32 nanometer wafer baking processes from the 45 nanometer tech used to make the Xeon 5500s, it wasn't hard to guess that Intel would be adding some more cores to or cranking the clocks on the Westmere-EPs.

As it turns out, and as you no doubt figured out because there is a speed limit on clock speeds enforced by the Thermal Police these days, Intel is going to be adding more cores and more on chip cache to the Westmere-EP chips.

Specifically, the Westmere-EP is using the extra transistor budget that the slide from 45 to 32 nanometer processes allows to add two more cores to the processor and to boost the on-chip L3 cache by 50 per cent to 12 MB per chip. Nasser Kurd, senior principle engineer at Intel's Architecture Group confirmed to El Reg that Intel will deliver four-core variants of these chips. Nasser also confirmed that the Westmere-EP chips will support Turbo Boost, which allows for the clock speed of the processor cores to be jacked up a bit as other elements of the chip are quiesced.

Generally speaking, the Westmere-EPs will have the same clock speed range and the same thermal envelopes as the existing Xeon 5500s, but Intel is has not yet announced specific SKUs and won't until the middle of March or so when these new chips are formally launched. The Westmere-EPs will plug into the same sockets and use the same chipsets and DDR3 main memory as the Xeon 5500s and have three memory channels per socket like them as well.

Intel Westmere EP 6 Core

The 32 nanometer, six core Westmere-EP chip

The six-core Westmere-EP chip has 1.17 billion transistors and is 240 square millimeters in size. As you can see from the pretty picture above, it is implemented in two halves of three cores each. The core regions have their own clock speed and power supply, and with the tweaks to the Westmere design the L3 cache and memory controller regions - what Intel calls the "uncore" areas - get their own, separate power gating.

3 Big data security analytics techniques

Next page: Uncore power gating

More from The Register

next story
This time it's 'Personal': new Office 365 sub covers just two devices
Redmond also brings Office into Google's back yard
Kingston DataTraveler MicroDuo: Turn your phone into a 72GB beast
USB-usiness in the front, micro-USB party in the back
Dropbox defends fantastically badly timed Condoleezza Rice appointment
'Nothing is going to change with Dr. Rice's appointment,' file sharer promises
BOFH: Oh DO tell us what you think. *CLICK*
$%%&amp Oh dear, we've been cut *CLICK* Well hello *CLICK* You're breaking up...
AMD's 'Seattle' 64-bit ARM server chips now sampling, set to launch in late 2014
But they won't appear in SeaMicro Fabric Compute Systems anytime soon
Amazon reveals its Google-killing 'R3' server instances
A mega-memory instance that never forgets
Cisco reps flog Whiptail's Invicta arrays against EMC and Pure
Storage reseller report reveals who's selling what
prev story

Whitepapers

SANS - Survey on application security programs
In this whitepaper learn about the state of application security programs and practices of 488 surveyed respondents, and discover how mature and effective these programs are.
Combat fraud and increase customer satisfaction
Based on their experience using HP ArcSight Enterprise Security Manager for IT security operations, Finansbank moved to HP ArcSight ESM for fraud management.
The benefits of software based PBX
Why you should break free from your proprietary PBX and how to leverage your existing server hardware.
Top three mobile application threats
Learn about three of the top mobile application security threats facing businesses today and recommendations on how to mitigate the risk.
3 Big data security analytics techniques
Applying these Big Data security analytics techniques can help you make your business safer by detecting attacks early, before significant damage is done.