IBM: Power7 to rollout throughout 2010
New System z11 mainframes next year, too
IBM's chief financial officer, Mark Loughridge, explained in a conference call with Wall Street analysts yesterday that the company thinks its high-end server business is on the mend, and will start growing profits in the fourth quarter. Loughridge also let the cat out of the bag a little about future Power7 RISC/Unix and z11 mainframe systems, due next year.
Ironically, as Loughridge was talking up the current product line, his comments about the future Power7 and z11 products could actually undercut sales in the coming quarters, because IBM is talking about future products while trying to sell current ones. New products always have better bang for the buck, so customers who can wait often do.
"Our 45 nanometer technology was sold out in the quarter," Loughridge said in discussing the manufacturing capacity of the Microelectronics wafer baker in East Fishkill, New York. And then he added this little titbit: "When you look at the broader demand for our 45nm technology, we are building Power7 now, and are on track for our systems launch in the first half of 2010. We have strong yields, in fact we are running five months ahead of our 65nm ramp. So this is going very well."
IBM has, of course, talked a little bit about the technical features of the future eight-core Power7 processor for its Power Systems iron (you can see El Reg's coverage here, there, and everywhere), but it has not really nailed down a timeframe for the launch to the IT public.
Later in the call, Loughridge was even more precise, saying that the Power7 chips would be rolled out across the Power Systems product line, and that the product refresh would be done by the end of 2010. He also mumbled that there would be a new System z mainframe lineup in 2010 as well, but offered no details.
The current z6 mainframe engines in the System z10 line of mainframes already have four processors cores per chip, so it would seem unlikely that the shift from 65nm to 45nm processes would be used to cram in more cores per chip. This is mainly because making z/OS scale across 128 cores would be a big issue, and for the monolithic workloads that tend to run on mainframes, having faster clock speeds would be more important than adding cores. Provided that the chip speed doesn't create too much heat, that is.
IBM has been mum on its plans for the so-called System z11 machines. Ian Bramley, managing director of IT analyst firm Software Strategies, put out a competitive analysis report pitting IBM's mainframe iron against Hewlett-Packard's Integrity servers, however. This claims to know some of the details of the future Power7 and z11 system launches.
You can get the report here, off of IBM's own Web site. Bramley conjectures that IBM will use the 45 nanometer shrink to add simultaneous multithreading to the quad-core z10 engines. It will then crank the clock to around 5 GHz, to boost the performance of the top-end mainframe to around 43,000 MIPS while still staying in the 16-socket configuration of the System z10. This stands to reason, considering that IBM does not want to pay a lot of dough to completely redesign the System z mainframe, not with sales down for the past year.
Bramley says to expect the z11 machines in the third quarter of 2010, which is a long, long time away in the computer business. If this is true, IBM is going to have to cut a lot of deals to keep selling mainframes for the next year.
Bramley also says to expect the first Power7 based machines, kickers to the current 32-socket Power 595, at the end of the first quarter of 2010. This is consistent with what the rumour mill has been mumbling about initial Power7 shipments, but IBM has confirmed nothing. If past history was any guide, midrange machines in the Power 570-class would get the Power7 chips first, then entry Power 520 boxes and midrange Power 550 and 560 boxes, and then Power 595s. The rollout that Bramley is suggesting is backwards, but that doesn't mean it will not happen.
I expect the specialized rack servers used in the "Blue Waters" massively parallel supercomputer at the University of Illinois to actually get the Power7 multichip module versions of the processor (which pack four whole Power7 chips, that's 32 cores onto a single chip package) to get the Power7s first. The rumour late last year was that these would be delivered in late 2009, but it is unclear if IBM can keep to that schedule. Two of these MCMs, for a total of 64 Power7 cores, will be crammed into a 2U form factor with 128 GB of memory and delivering around 2 teraflops of number-crunching power. ®
Interesting times ahead!
Can't wait to play with Power7! Darn, the IBM salesgrunts might read that, I must act nonchalant in the hope of a bigger discount. Then again, the hp salesgrunt could also read that and offer a discount.... This could be tricky!
"....Ironically, as Loughridge was talking up the current product line, his comments about the future Power7 and z11 products could actually undercut sales in the coming quarters...." Well, yes and no. Yes, many customers will think about waiting. But the death of Sun did make roadmaps a lot more important to many in the industry, so Loughridge was probably trying to reassure IBM customers that they're on track and have a future.
RE: David Halko (I give up.)
If you can't see it, you can't see it :)=
RE David Halko on Ellison whips out his Sparc TPC-C test #
You know, I think we are just about done with this line of discussion - I think there is one last piece left in regard to the conversation from this thread which carried to this commentary:
David earlier posts, "I don't think I made fun of multi-chip modules, at least I didn't try to. I merely said it was a business-man's approach. MCM's require less engineering, get faster to production, uses older technology effectively, reduces risk, but does not perform as fast if engineered it onto a single piece of silicon."
David later posts, "Doubtless, there are many benefits to multi-chip modules, as well as drawbacks"
Jesper posts, "And the drawbacks are ?... I suspect that the only reason you say it's not innovative is cause SUN doesn't do MCM's."
David later post, "I covered the main drawback above in a previous quote. I can add additional arguments (production line manufacturing of a single-chip solution is normally less expensive than an MCM - the consumer market size drives the most profitable implementation.)"
Jesper posts, "No your original comment was 'Some may argue that the MCM's were innovative engineering, disagree and suggest MCM's are a pragmatic business-man's short term solution to a technical problem.' That is not 'technology is what it is and I appreciate it as it is.'"
I copied the relevant posts, in the order of my making them, into this message. Let me highlight the first example of a disadvantage that I mentioned:
"MCM's ... but does not perform as fast if engineered it onto a single piece of silicon."
I added an additional drawback, since I could still not understand what you were trying to get at.
"production line manufacturing of a single-chip solution is normally less expensive than an MCM - the consumer market size drives the most profitable implementation."
I am not sure what you are trying to get at, honestly. My discussion was surrounding how multi-chip modules were a pragmatic solution based upon benefits and drawbacks that required less innovation at the engineering level than a single chip solution.
This does not mean that I believe innovative ideas are devoid in multi-chip modules. I did not mean my position to be mutually exclusive, merely a generalization to give an impression of my leaning.
Have a good day Jesper!