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Phase Change Memory enters new, um, phase

Numonyx early access programme

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Phase Change Memory has promised much and delivered very little. That might be about to, well, change as a secretive supplier starts to open up on what the technology can do.

PCM cells use a Chalcogenide glass substance which can be changed between crystallised and amorphous, non-crystallised states by the application of heat. These two states or phases have different and detectable resistance levels which can be used to indicate binary ones or zeros. The technology produces memory cells with read and write speeds closer to DRAM than NAND flash memory while still being non-volatile.

As such, suppliers endorsing PCM, such as Numonyx, are positioning it as a successor to flash technology, which is anticipated to run into insoluble technical difficulties as it progresses to dies based on process technology smaller than 32nm. The number of electrons in a flash cell will be so small, less than 100 it's said, that error rates will prevent reliable working.

Step forward PCM which doesn't rely on electrons like NAND. It also has bit-level and not block-level addressability and erasability, getting rid of one NAND flash issue. The problem is that PCM hasn't been really available commercially and there are no publicly-available data sheets specifying its read and write IOPS performance, nor its sustained read and write data transfer bandwidth. That might be because it's really quite poor and the DRAM speed equivalency claims are hogwash. Alternatively, it might be through commercial sensitivity.

Back in December last year, Numonyx, a joint-venture creature formed by Intel and STMicroelectronics, introduced its first PCM chip, Alverstone by name, built on a 90nm process and with 128MBit capacity. It was shipping, Numonyx said, to un-named suppliers, and it was a single level cell (SLC meaning 1 bit per cell) device. No Alverstone data sheets have ever been seen publicly and no end-user products are known that use Alverstone dies.

It seems reasonable to view Alverstone as a a trial product. In February this year, ElectronicsWeekly.com posted more information based on a briefing from Numonyx' chief technology officer Ed Doller. He said Numonyx had taped out a 1Gbit PCM die using 45nm process technology. This is well below, he agreed, NAND flash and its floating gate technology which is producing 16Gbit dies. Still, it's a huge advance on 128Mbits.

Reading between the lines here we can guess that Numonyx has found it very difficult to build large capacity PCM chips on small dies. It has, and no doubt still is, trying to build multi-level cell (MLC) PCM, adding bits to a PCM cell, to increase capacity but has found that access speeds are unacceptable. It showed a 2-bit PCM die at the 2008 ISSCC event and access slowness was apparent then.

Doller told ElectronicsWeekly that a 45nm version of Alverstone would begin sampling later this year and that a version more advanced than 90nm was currently sampling. Numonyx has a 32nm process apparently planned for next year. Doller also said that IBM researchers had demonstrated workable PCM dies with a 5nm process which, it was thought, meant that PCM has a roadmap through several generations of process shrinkage, giving it quite a long life 'if' the dratted technology can be made to produce sufficiently high capacity chips with the claimed DRAM-like performance. So far it obviously hasn't.

Samsung Electronics and Numonyx announced late in June that they are jointly developing market specifications for Phase Change Memory (PCM) products. This, they say, should help makers of handsets and mobile applications, embedded systems and high-end computing devices by simplifying designs and shortening development time, enabling them to more readily use PCM products from both companies.

They are developing common specifications – or “pin for pin” hardware and software compatibility – for mobile, embedded, and other potential computing applications supporting the JEDEC LPDDR2 Low Power Memory Device Standard. These will be completed this year, with both companies expecting to have compliant devices available next year.

Now Numonyx is starting up an early access programme so prospective customers can kick PCM's tires and see if its use would be a good idea. If you sign up for the programme then you get: "an opportunity to review preliminary data sheets from Numonyx on existing and future PCM products from the company. Participants will also have an opportunity to order engineering samples of PCM products through the Numonyx sales team. In addition, the company will provide regular updates on essential news and data to ensure customers have all the latest available information about PCM."

The data sheets will, we guess, be delivered in a non-disclosure basis and we general public members won't be any better informed than before.

This is an organised PCM sample chip ship programme in effect. Again, indulging in some reading between the lines, Numonyx' PCM chips may not yet be ready for prime time and don't yet have the DRAM-like access speeds and high-enough capacities needed to enable them to cross over from sampling shipments to live production runs.

Numonyx' willingness to deliver data sheets to signed-up customers who may sample chips if they wish and its common specification exercise with Samsung both indicate that PCM technology could be getting closer to usable and deliverable product. There is so much cynicism abroad about PCM though that the two will have to do a lot of work before cynicism turns to acceptance. ®

Reducing the cost and complexity of web vulnerability management

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