NEC fumbles towards MRAM flip-flop
Standing by for near-zero standby
NEC has made more progress in its development of a flip-flop switch for system-on-chips that offers near zero electricity use in standby states by using magnetic RAM technology.
Magnetic RAM uses the direction of a magnetic field in a memory cell to indicate a binary one or zero, and is one of the candidates posited to succeed NAND flash by combining the speed characteristics of RAM with the non-volatility of flash.
NEC's use of MRAM technology was revealed at the beginning of the year. System-on-chips (SOCs) are used in various mobile devices and there is an increasing need to reduce their power consumption, particularly if the unit is battery-operated.
NEC says that SOCs have CMOS gate logic circuits which need constant clock-synchronised power to preserve their state. A component called a data flip-flop is involved here along with static RAM (SRAM).
What NEC has done is to replace the data flip-flop with a magnetic flip-flop and the SRAM with MRAM. This makes the SOC non-volatile, meaning it can be switched into a standby state and not lose data if power is switched off. A magnetic flip-flop (MFF) is produced by integrating magnetic tunnel junctions and circuits that switch the junction's magnetism direction with the data flip-flop.
Ferro-electroc RAM (FeRAM) technology was rejected because it uses more power and has a limited re-write capacity.
NEC has developed a MFF needing 1V or less power and with unlimited write endurance. As mentioned in Tech-ON, it aims to have prototype SOCs ready in a few years to enable products like PCs, Blu-Ray disk recorders or digital video disk records to use near-zero power when in standby mode.
The concept is more powerful than being able to leave devices switched on overnight. That doesn't appear to be the main aim which is to enable devices to be almost switched off whenever they are idle. For example, a PC keyboard waiting for key input could switch itself off. As soon as a key is depressed power could be switched back on again, the required processing carried out, and then the device switched off.
NEC reckons the entire PC could be switched off, but that gets one thinking about screen displays and network access where the idea of an instant (network) on state seems hard to understand. It's easier with disk recorders because they don't have PC-like displays.
Mobile phones represent another tricky area; they cannot be switched off like this because they are in a call-waiting state. However, they might be able to switch part of their componentry off and so save power and extend battery life.
NEC's magnetic flip-flop could also reduce power use in devices which currently need a relatively high amount of power to start up, such as an LCD television, by enabling much lower power use in startup because the SOC remembers its state and can be switched on pretty well instantly. There is some more detail in the Tech-ON NEC-written story referenced above.
The company notes that operating systems and application software in computers and mobile devices would need changing to work with hardware characterised by frequent on-off operations. If this were done it's easy to see that a computing device which appears to be on all the time when in use, although it is actually flip-flopping between on and off states as and when it needs to deal with input, could use a lot less power than one actually on all the time.
If entry to and start-up from hibernation could be near-instant, then power use in input-bound devices throughout the day could be cut in half or more. ®
Re: Confusion of static and dynamic power
If you are describing a fully static system, then no, clocks are not required to keep the state. However a fully static system requires more transistors per state storage "bit" that latch the bit as a 1 or 0 with feedback to keep the bit latched, despite low levels of leakage that occur. This type of memory is SRAM.
Nowadays, most systems are dynamic (including computer RAM; hence the term DRAM). This requires far fewer transistors per bit and hence allows for smaller chips, or chips that do more stuff. Unfortunately there is always a small leakage from the bits, so they need to be read and written back peridically to refresh them and this requires clocks.
Re: So what happens...
I expect it's the same as a hard drive in that respect. It doesn't seem to be a problem in practice.
So what happens...
If you go waving a large magnet near it and fudge the flip-flops?
You missed an application
Fast access, unlimited write cycles, and you don't lose any data if the power trips out half-way through. Sounds perfect for the write cache on a hard drive, or the journal on a file-system that has such a thing.
Confusion of static and dynamic power
"NEC says that SOCs have CMOS gate logic circuits which need constant clock-synchronised power to preserve their state. A component called a data flip-flop is involved here along with static RAM (SRAM)."
OK I know this is a pedantic point, but the preservation of state does not require a clock -- most CMOS logic can have its clock speed reduced all the way to zero -- it consumes only "leakage power". Admittedly this is still quite a large proportion of the total power consumed by a typical SoC.