IBM lifts the veil on Power7 chips
Promises upgrades from Power6 boxes
Price cut coming?
In May 2006, after the dual-core Power5+ chips came out late and didn't offer the kind of performance boost customers were expecting and the Power6 chips were pushed out into 2007 instead of their expected fall 2006 launch, IBM offered customers using System p 570 (16 core), 590 (32 core), and 595 (64 core) machines upgrade paths to the future Power6 machines that preserved serial numbers on Power5 and Power5+ boxes. The delays with the Power6 chips and a nine per cent drop in Unix server sales in the first quarter of 2006 also compelled Big Blue to cut prices on Power 590 and 595 machines.
IBM has not cut prices on its current Power6 and Power6+ servers, but if the upgrade guarantee doesn't grease the sales skids, that will be the next move.
In addition to talking about the upgrade path guarantee, Handy also provided a few more details about the future Power7 chip, which will be implemented in a 45 nanometer chip process and which will be manufactured in IBM's East Fishkill, New York, foundry. Back in December 2008, when discussing the "Blue Waters" supercomputer and its data center, IBM had confirmed that Power7 chips would have eight cores.
According to Handy, IBM actually plans to offer Power7 chips with four, six, or eight cores when they begin shipping in systems some time in the first half of 2010. He would not be more precise about the launch schedule, except that it would be a staggered announcement as was the case with the Power5 and Power6 rollouts, starting on a few machines and eventually spanning the line.
The Power7 chips will come with a variety of clock speeds, too, some designed to give the most performance per core and some designed to deliver the most performance per watt. The word on the street last year was that the Power7 chips would clock at between 3 GHz and 4 GHz, but IBM has not confirmed this (even now). Handy also added that the Power7 chips will support up to four threads per core, up from the two threads per core of the Power5 and Power6 generations.
What IBM did say is that depending on the chip, the Power7 variants will offer anywhere from two to three times the performance per watt of a Power6 chip at a given wattage. In the jump from Power5 to Power6 (which was actually two steps including the Power5+), IBM delivered about twice the oomph in the same energy envelope. The jump from Power5+ chips to Power6 chips was more like 50 per cent more oomph by my estimate, and the move from Power6 to Power6+ was more like 15 per cent.
Clearly chips with a plus don't fare well at IBM, since the Power4+ was not much to write home about, either. Anyway, provided that the energy envelope of the Power7 machines remains more or less the same, what this means is that customers can expect two to three times the performance.
IBM also confirmed that the Power7 chips will support DDR3 main memory; Power6 and Power6+ servers use DDR2 memory, and Power5 and Power5+ machines used DDR1. IBM currently uses double data rate InfiniBand links between the Power6 and Power6+ chips out to remote I/O drawers (which it calls 12X I/O), and it is not yet clear if IBM will boost this up to quad data rate InfiniBand with the initial Power7 machines, according to Handy.
Customers using the older Remote I/O drawers and their High Speed Links (IBM's funny name for Fibre Channel peripheral links to external I/O cages) will have to upgrade to 12X I/O before moving to Power7 chips, since Remote I/O will not be supported with Power7 servers as it was with Power6 and Power6+ machines.
On the logical partitioning front, the Power7 machines will be able to host up to 1,000 partitions per system, up from the current maximum of 254 partitions on Power5 through Power6+ machines. I have been told in the past that the Power6 and Power6+ chips could already, in theory, support 1,000 partitions, but for whatever reason IBM did not activate this latent capacity. Presumably the Power7 chips theoretically support something akin to 4,000 partitions on boxes using eight-core chips; IBM didn't say.
Handy said that IBM will patch its AIX 6.1 Unix variant as well as its i 6.1 proprietary operating system so it can run atop the Power7 chips and make use of its features. Some time in 2010, whole new AIX 7 and i 7 operating systems will be delivered by IBM, not only with full Power7 support, but presumably with other capabilities.
IBM plans to talk a bit more about the Power7 chip and server designs at the Hot Chips conference hosted by the IEEE at the end of August at Stanford University. We'll keep you posted. ®