Wind River punts homegrown hypervisor
Extra goodies for Intel
One thing that Intel will inherit when it closes its $884m deal to acquire  embedded and real-time operating system maker Wind River this summer is a new cross-chip virtualization hypervisor that the software maker has created all by its lonesome.
Every watt, every clock cycle and megabyte, and every dollar count in the embedded systems space, says Tomas Evensen, chief technology officer at Wind River. Companies that make embedded controllers, telecom switches, and myriad other devices are not usually keen on trying to build their gear using the general-purpose chips inside PCs and servers or using the existing hypervisors available for these processors.
Wind River supports PowerPC, x64, ARM, and MIPS processors with its VxWorks and Wind River Linux real-time operating systems and its related Workbench application development tool kit. And the one thing it does not want to do is to license and support different hypervisors on different chip architectures.
The whole point of the Workbench suite is to insulate application developers from the underlying differences in the embedded chips they pick for whatever gadget they are coming up with while at the same time taking advantage of whatever unique hardware is available for those architectures.
That basically left Wind River with one choice when it came to virtualization for the four processor families it supports with Workbench: create its own cross-architecture hypervisor. And so that's what Wind River has done.
According to Evensen, the Wind River Hypervisor announced today is a bare-metal or type 1 hypervisor, one that provides for isolation between virtual machines in that it runs right atop the iron, not as a layer on top of an operating system that is in turn sliced up into virtual machines that can support other operating systems - that's a type 2 hypervisor in the virtualization lingo.
Wind River's hypervisor comes from its prior experience in creating so-called separation kernels for its operating system, which isolate different applications from each other when running on a single kernel, a requirement that military and aerospace embedded systems often require. Their two different kernel specs are known as MILS and 653, and the new hypervisor created by Wind River, which is comprised of fewer than 10,000 lines of code, is based on its prior experience with putting what amounts to a virtual private server partition atop VxWorks.
But this time around, the hypervisor supports full and incompatible operating systems running inside different virtual machine partitions, and it will span four different processor architectures. And more importantly, says Evensen, because some workloads require more performance and others require higher security, this Wind River Hypervisor also has scalability, which means users can pick what security or performance characteristics of the hypervisor to invoke, depending on their needs.
More rugged security impacts performance, but not every embedded application needs top-end security. A hypervisor used inside a multifunction printer doesn't need the same security and isolation as partitions running in a jet fighter's systems, and there is no reason why the hypervisor has to be exactly the same (in terms of activated features) even if the code base is the same.
The Wind River Hypervisor is being rolled out first on Intel Core 2 Duo, Xeon 3500 and 5500 Nehalem, and Atom embedded processors, as well as PowerPC chips from IBM and Freescale Semiconductor. The Power chips have historically been the most popular for embedded applications, given the long-time popularity of the Motorola 68K processors in embedded devices and the fact that the PowerPC was its kicker.
AMD and VIA need not apply
But Evensen says these days, about half of Wind River's business is for Power platforms and half is for Intel chips. And when I say Intel, I mean Intel - Wind River does not support x86 and x64 chips from Advanced Micro Devices or VIA Technologies, and has no plans to do so at this time, according to Evensen, because customer demand is not there.
While VxWorks and Wind River Linux applications might not know it, the Wind River Hypervisor is not the same on the four different types of embedded platforms. The hypervisor has to do more things in software on PowerPC chips because IBM and Freescale have not added virtualization electronics to the PowerPC chips - although Power4, Power5, and Power6 chips from IBM have added increasingly sophisticated virtualization features, making the PowerVM hypervisor leaner and meaner on more modern iron.
Intel's Core 2 Duo, Nehalem, and Atom processors have VT-d electronics, and the Wind River Hypervisor takes advantage of those features. If IBM has any brains, it will make sure it has virtualization support in future PowerPC chips so it doesn't lose its game-console business and lots of other embedded controller business to Intel.
Wind River is not announcing specific launch dates for support on MIPS and ARM chips for the new hypervisor, but the company is working on it.
On servers, the advent of multicore and multithreaded processors have enabled companies to use virtualization hypervisors to consolidate multiple workloads and drive up CPU, memory, and I/O utilization on their servers. And the same forces are at work in the embedded systems market - but with a slightly different twist.
Because of security and application-isolation concerns, different applications on an embedded system have had to be run on separate system boards, which can make an embedded system larger, hotter, and more costly than it might otherwise be in the Age of Virtualization. Now, instead of creating custom interconnects between system boards and their dataplanes and custom ASICs, system makers can just use a multicore system and use the memory buses or point-to-point interconnects in the chips to have different processors and their application stacks communicate with each other.
This scheme is sometimes known as asymmetric multiprocessing (AMP), as distinct from symmetric multiprocessor (SMP), which is when multiple processor cores are lashed together and share a single memory space where a single operating system (or these days, a single hypervisor) runs.
According to Evensen, 70 per cent of Wind River's customers are not interested in virtualizing processors to carve up CPUs into skinny slices so much as treating each CPU as an isolated compute engine and virtualizing access to memory and I/O devices. This is another aspect of the scalable hypervisor that Wind River has created. If you don't want to chop up CPUs into skinnier computers, you don't activate and run that part of the hypervisor, which makes it run leaner and meaner.
The first customer for the new hypervisor is Hughes Networks, which has deployed the hypervisor on an unnamed chip inside of the dashboard of an unspecified car. The chip runs the Wind River Hypervisor and has a small, fast-boot Linux kernel that is used to control the engine and ignition system, which you want to turn on as soon as you put the key into the slot. On another partition is a Linux instance that is running the screen and other components of the dashboard screen, which can take a little longer to boot and not keep the car from starting as it boots up.
Wind River did not supply pricing for its hypervisor. Its operating systems and Workbench tools are licensed by developer seats and then customers pay for runtime licenses, depending on how they deploy the hypervisor and operating systems in their embedded devices.
One more thing: Wind River has proven that it is possible to have a single, cross-chip hypervisor - something the commercial IT industry desperately needs but will probably never have because VMware, IBM, Hewlett-Packard, Citrix Systems, and Red Hat have more to gain by keeping control of their hypervisors and related tool stacks than working together to create a common hypervisor and differentiated or similar tool stacks. ®