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Wind River punts homegrown hypervisor

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One thing that Intel will inherit when it closes its $884m deal to acquire embedded and real-time operating system maker Wind River this summer is a new cross-chip virtualization hypervisor that the software maker has created all by its lonesome.

Every watt, every clock cycle and megabyte, and every dollar count in the embedded systems space, says Tomas Evensen, chief technology officer at Wind River. Companies that make embedded controllers, telecom switches, and myriad other devices are not usually keen on trying to build their gear using the general-purpose chips inside PCs and servers or using the existing hypervisors available for these processors.

Wind River supports PowerPC, x64, ARM, and MIPS processors with its VxWorks and Wind River Linux real-time operating systems and its related Workbench application development tool kit. And the one thing it does not want to do is to license and support different hypervisors on different chip architectures.

The whole point of the Workbench suite is to insulate application developers from the underlying differences in the embedded chips they pick for whatever gadget they are coming up with while at the same time taking advantage of whatever unique hardware is available for those architectures.

That basically left Wind River with one choice when it came to virtualization for the four processor families it supports with Workbench: create its own cross-architecture hypervisor. And so that's what Wind River has done.

According to Evensen, the Wind River Hypervisor announced today is a bare-metal or type 1 hypervisor, one that provides for isolation between virtual machines in that it runs right atop the iron, not as a layer on top of an operating system that is in turn sliced up into virtual machines that can support other operating systems - that's a type 2 hypervisor in the virtualization lingo.

Wind River's hypervisor comes from its prior experience in creating so-called separation kernels for its operating system, which isolate different applications from each other when running on a single kernel, a requirement that military and aerospace embedded systems often require. Their two different kernel specs are known as MILS and 653, and the new hypervisor created by Wind River, which is comprised of fewer than 10,000 lines of code, is based on its prior experience with putting what amounts to a virtual private server partition atop VxWorks.

But this time around, the hypervisor supports full and incompatible operating systems running inside different virtual machine partitions, and it will span four different processor architectures. And more importantly, says Evensen, because some workloads require more performance and others require higher security, this Wind River Hypervisor also has scalability, which means users can pick what security or performance characteristics of the hypervisor to invoke, depending on their needs.

More rugged security impacts performance, but not every embedded application needs top-end security. A hypervisor used inside a multifunction printer doesn't need the same security and isolation as partitions running in a jet fighter's systems, and there is no reason why the hypervisor has to be exactly the same (in terms of activated features) even if the code base is the same.

The Wind River Hypervisor is being rolled out first on Intel Core 2 Duo, Xeon 3500 and 5500 Nehalem, and Atom embedded processors, as well as PowerPC chips from IBM and Freescale Semiconductor. The Power chips have historically been the most popular for embedded applications, given the long-time popularity of the Motorola 68K processors in embedded devices and the fact that the PowerPC was its kicker.

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