IBM slips Power6+ into racks, blades
The chip that dare not speak its name
As part of a Dynamic Infrastructure hardware, software, and services announcement blitz today, IBM announced that it has put its Power6+ processor into entry and midrange Power Systems rack servers while delivering a more scalable Power6+ blade server that resembles the clever design Big Blue has used for several years on Opteron-based blades.
As we reported elsewhere, these four machines are not the first to get the dual-core Power6+ processor, a follow-on to the Power6 chip that launched in July 2007 and that was rolled into the converged Power Systems line (formerly separate System i proprietary boxes and System p Unix and Linux boxes) in April 2008. Don't expect IBM to cop to the Power6+ chip being in the tweaked Power 520 and Power 550 rack servers or the new JS23 and JS43 blade servers. But trust me, they're Power6+ chips.
The tweaked Power 520 announced today has 4.7 GHz Power6+ processors in it instead of the 4.2 GHz Power6 chips that debuted with the 4U box this time last year. In addition to the slightly faster clock speed, the Power6+ packaging used this time around has 32 MB of L3 cache in the processor package. That's what more powerful Power Systems generally have, and this L3 cache was cut from the Power 520 design to artificially lower performance.
The Power 520 is still sold with either processor and comes with configurations with one, two, or four cores and 16 GB of DDR2 main memory per core. The machine has six 3.5-inch hot swap disk bays, three PCI-Express slots, and two PCI-X slots. (The I/O is getting a little stale here and will probably be refreshed in the fall with a Power6+ processor kicker. I expect 2.5-inch SAS drives). The Power 520 can support up to 40 logical partitions.
The L3 cache is important. The original JS12 and JS22 Power6-based blade servers were also missing this L3 cache, and it crimped performance quite a bit on cache-sensitive workloads. The midrange Power6 machines and now these four new Power6+ machines all have one 32 MB L3 cache for each dual-core processor. The high-end Power 595 has 32 MB of L3 cache per core (not per processor) and the L2 caches and cores on each dual-core Power6 chip used in the Power 595 can reach either L3 cache.
The Power 595 does not use the Power6+ yet, but I would not be surprised to see it appear later this year running at as high as 6 GHz in a multi-chip module (MCM) packaging IBM has for the Power 595. (The MCM tends to allow higher clock speeds than IBM can get with single-chip or dual-chip module packaging - at least that has been the history of the Power server line since the dual-core Power4 was launched in October 2001).
Anyway, a two-core Power 520 using the 4.7 GHz Power6+ packaging is rated at 20.13 on IBM's rPerf AIX relative performance benchmark test (a variant of the TPC-C online benchmark that has been tweaked to stress CPU and memory instead of I/O), about 26 per cent more performance than the Power 520 with two 4.2 GHz cores and no L3 cache. Based on clock speed alone, the Power6+ should do about 12 per cent more work on the rPerf test. The performance differential on the four-core Power 520s is the same - about 26 per cent - on the rPerf ratings.
For customers who need more oomph than this - and who are particularly keen on using the larger Power 550 midrange box to consolidate workloads using IBM's PowerVM logical partitioning hypervisor - IBM is cranking up the clocks on this midrange workhorse. The Power 550 comes in a 4U box, just like the Power 520, but crams twice as many cores into the space. With today's announcement, the Power 550 can have from two to eight Power6+ cores (that's four chips on four processor cards that plug into the system board like a mezzanine card) and up to 256 GB of main memory.
While a new "Nehalem EP" Xeon 5500 server can cram as many cores and threads into a 2U or 4U form factor as IBM is doing with the Power 550, what the Nehalem box can't do is scale memory as far. Right now, the practical limit for memory is really 72 GB because 8 GB DDR3 memory modules are not available at a price that makes any sense at all. And even when they are, that box will top out at 144 GB of main memory anyway.
<pp>IBM can throw more memory at each thread than an x64 box can, at least for now. And on virtualized server workloads, this is what matters as much (and perhaps more) than clock speeds. The Power 550 can support up to 80 logical partitions, which can run IBM's AIX or i operating systems or the Linuxes from Red Hat and Novell. It has the same I/O slot configuration and 3.5-inch disk bays as the Power 520, and its rPerf performance ranges from 21.18 (two cores running at 5 GHz) to 78.6 (eight cores running at 5 GHz).