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Sockets, cores and threads, oh my

Intel's silicon brick roadmap

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Intel gave us lucky hacks a post-Nehalem launch briefing to outline aspects of its near-term processor roadmap. Here's a fast-paced tour through the briefing content.

Intel reassured us that it could see Moore's Law progression being maintained for another ten or so years with the process shrinks and other developments in its roadmap. The inexorable rise in transistor counts on dies, 731 million with Nehalem quad-cores, should continue over that period. The big issue is people comprehending how to use parallelism.

Intel Server Processors

Intel's server platforms groups covers several markets: high-performance computing (HPC), internet data centres and the cloud, RISC migration, storage and the virtualised data centre. Its building blocks are CPUs, chipsets, the LAN, SSD/RAID, boards/KDKs and software. Its processor platforms are Itanium (9000 series) for mission-critical servers, Xeon 7000s for high-end enterprise servers, Xeon 5000s for mainstream enterprise quad- and dual-socket servers, and Xeon 3000s for single socket SME servers. Obviously Xeon 7000s and Itanium compete in everyone's eyes but Intel's.

Much was made of Intel designing in virtual server support features to hopefully get apps running in virtual machines running as fast as apps running in a non-virtualised server.

We had a quick romp through the Xeon 5500's features and then got to the interesting bit, Westmere-EP, the next-generation Nehalem (5000 series) processor built with a coming 32nm process. Westmere is basically a Nehalem shrink onto the 32nm process.

It will have six cores, cache enhancements and better energy efficiency, and will be announced in 2010. Also it will be socket-compatible with the 5500, so server vendors can use existing server boards and plug Westmere processors straight in. The graphic showed a PCI 2 bus linking Westmere to an Intel X25-E SSD, and an Intel 10GbitE controller.

Intel has a tick-tock analogy for its engineering developments. A "tick" is a process shrink using the current micro-architecture. The last tick was the move to the current 45nm process technology. A "tock" is the introduction of a new processor micro-archictecture and Nehalem is the latest tock event.

It will be followed by the 32nm tick which will, in turn, be followed by the next micro-architecture after Nehalem.

On the 7000 front the 7400 is a 6-core 45nm processor that's socket-compatible with the previous 7300. It will be followed by Nehalem-EX in the second half of this year and then Westmere-EX some time later.

Nehalem-EX, built on the 45nm process, is an 8-core processor designed for 4-socket platforms, meaning 64 threads (2 threads/core still). It will use an Intel Scalable Memory Interconnect with Buffers and what Intel called next-generation I/O technology with virtualisation.

There will be Intel VT technology in the processor (VT-x), the chipset (VT-d) and for the network (VT-c). The idea is to get these components working better together so that server vendors will go all-Intel instead of using third-party chipsets and communications interfaces. Thus there's no need for a Fibre Channel over Ethernet adapter, a CNA, because these VT features plus Intel's software FCOE initiator will get the Intel 10GbitE NIC spurting out FCOE packets at near wire speed to direct-attached devices.

There will be Virtual Machine Device Queues (VMDq) to improve throughput by offloading data sorting to the NIC. In a virtualised server the virtual machine (VM) will more or less talk directly to the NIC without having to go through the hypervisor. (Naturally that means the individual VMs in the server use CPU cycles to do the FCOE work though. Why Intel doesn't go for FCOE-offload is beyond me. It tried to do the same thing with TCP/IP offload, saying there was no need, and pretty much lost that argument.)

Intel has introduced Flex Migration so VMs can be readily transferred between different Xeon servers. Previously, notwithstanding instruction set compatibility between 3000s, 5000s and 7000 Xeons, VMs could only be moved between similar processor types.

We can expect a Nehalem version of the 3300, probably the 3400 and probably later this year or in 2010.

Cloud based data management

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Latest Comments

Itanium taking share from IBM and Sun

Itanium fills a role at the head of the high-end server class, despite its detractors there is no better option for mission critical computing. Read more at: http://blog.itaniumsolutions.org/

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@Mad Mike: Power 6+ & 7 will probably be screamers!

I guess I was wrong... The IBM Power6+ was not a screamer...

http://www.theregister.co.uk/2009/04/28/ibm_shipped_power6_plus_already/comments/

Silently released, no significant performance boost.

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RE: Projected Intel, IBM, AMD, and Oracle/SUN/Fujitsu processors

Matt Bryant says, "And the Nehalem and Barcelona cores are full-bodied cores with a real pipeline to keep those threads spinning"

But the cores are not always processing, waiting for memory accesses on cache misses.

Matt Bryant continues, "whereas the whole Sun design is a capitulation to the idea that you can't have all the threads going at once, because Sun couldn't design a bus or core powerful enough to"

Actually, Sun designed a core powerful enough to run an instruction for every clock cycle, not stalling. The difference is that when the Sun thread stalls, it does not stall the core, while with other processors, the core stalls.

The Sun design was brilliant, attacking the core not running 100% of the time, using a different strategy to keep it working. It was a very unique solution in the marketplace. It does not work well for all workloads, but it is superior for many workloads. (i.e. on web servers, a single socket T2 processor will handle encrypted traffic almost as well as a quad socket Intel machine!)

Matt Bryant suggests, "T3 will still have the same scale problems of all the Niagara lines"

A single socket octal core T2 performing slightly slower than a quad socket hex core Intel is not a bad scaling problem to have - especially when the T2 will scale to 4 sockets... and easily outrun 12 hex-core Intel sockets in encrypted middleware bus or web-server loads.

http://spec.org/cgi-bin/osgresults?conf=web2005&op=fetch&proj-COMPANY=256&proj-SYSTEM=256&proj-PEAK=256&proj-HTTPSW=256&proj-CORES=256&proj-CHIPS=256&critop-CHIPS=0&crit-CHIPS=1&proj-CORESCHP=256&proj-CPU=0&proj-CACHE1=0&proj-CACHE2=0&proj-CACHE3=0&proj-MEMORY=0&proj-NETNCTRL=0&proj-NETCTRL=0&proj-NNETS=0&proj-NETTYPE=0&proj-NETSPEED=0&proj-TIMEWAIT=0&proj-DSKCTRL=0&proj-DISK=0&proj-SCRIPTS=0&proj-WEBCACHE=0&proj-OS=0&proj-HWAVAIL=0&crit2-HWAVAIL=Jan&proj-OSAVAIL=0&crit2-OSAVAIL=Jan&proj-SWAVAIL=0&crit2-SWAVAIL=Jan&proj-LICENSE=0&proj-TESTER=0&proj-TESTDAT=0&crit2-TESTDAT=Jan&proj-PUBLISH=256&crit2-PUBLISH=Jan&proj-UPDATE=0&crit2-UPDATE=Jan&dups=0&duplist=COMPANY&duplist=SYSTEM&duplist=CORES&duplist=CHIPS&duplist=CORESCHP&duplist=CPU&duplist=CACHE1&duplist=CACHE2&duplist=CACHE3&duplist=NETTYPE&dupkey=PUBLISH&latest=Dec-9999&sort1=PEAK&sdir1=-1&sort2=SYSTEM&sdir2=1&sort3=CORESCHP&sdir3=-1&format=tab

Matt Bryant predicts, "SPARC... I predict Larry will cut them lose without a second thought."

So far, both Oracle & SUN indicate that SPARC is staying around... Larry seems to disagree with you on his first thought since merger announcement.

If RocK is significantly late (again) and T3 is late (CoolThreads have been on-time or early since 2005) - I agree this may be a reasonable prediction. Perhaps Larry's second thought will be align with your prediction under these conditions.

I guess, we will see!!!

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