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Itanium delayed six months

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CSI Intel

For those of you who remember ancient Xeon and Itanium history, the Common System Interface effort that was launched by a battered Intel in early 2004 had two elements. The first was that Xeon and Itanium machines would have a common, HyperTransport-like point-to-point interconnect that was much better than the front side bus and chipsets Intel has used with Xeons and Itaniums to date. The Nehalem Xeons and the Tukwila Itaniums are the first machines to implement this technology, which we know as QuickPath Interconnect, or QPI.

The second element of the CSI effort was to have Xeon and Itanium processors using a common set of chipsets and processor sockets so companies could build systems to support either kind of processor. Given the low volumes of Itanium machines relative to Xeon boxes, this is clearly a good idea to help server makers cut costs.

Itanium Roadmap 2008

Intel's April 2008 Itanium Roadmap

The new Tukwila-Poulson-Kittson chips will not share the same socket as Nehalem boxes, according to Intel. But as the roadmap above shows, Intel has been telling people since April 2008 - when this roadmap was created - that Tukwila and Xeon MP chips would have common chipsets. In this case, it is a chipset codenamed "Boxboro."

According to Intel, HP and other OEMs also had a hand in the decision to delay the quad-core Itanium chip so it could get some technology tweaks. "We made the decision along with the OEMs," says Patrick Ward, an Intel spokesperson who handles the Itanium product. "It was a joint decision and we felt that this would benefit OEMs and end user customers. We did not make these changes alone."

It is hard to tell who rues the Itanium partnership more, Hewlett-Packard or Intel. The chip maker should have never listened to HP and created the EPIC architecture, which helped HP support HP-UX better. It might be technically superior to the x86 and extended x64 architectures, but Itanium was no better off in the marketplace than HP's own PA-RISC chips or Sun's Sparcs or IBM's Powers.

HP has put all of its HP-UX eggs in the Itanium basket, so it has to deal with these delays. At this stage in the Itanium game, it may be HP, not Intel, that gets hurt most by continuing delays in the Itanium roadmap.

Lucky for Intel and HP, Sun Microsystems' 16-core "Rock" UltraSparc-RK chip is running late, being delayed by a year, and who knows whether IBM will get a Power6+ chip out the door. It could be a crank on the current dual-core Power6 or a jump to a quad-core design. Or it could never see the light of day.

With the economy in the dumps and enterprise customers who buy Itanium boxes slamming on the spending brakes - and IBM's eight-core Power7 chips not expected until early 2010 - Intel and HP have a little breathing room. ®

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