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AMD plans 12-core server chip for 2010

First 6-core offering due next year

Internet Security Threat Report 2014

AMD today shed light on its upcoming server workstation roadmap, revealing details on its first six-core processor, expected to be released next year, and a 12-core offering, due by 2010.

The upcoming dodeca-core chip will use AMD's next generation socket platform, dubbed "Maranello."

In the second half of '09, AMD plans to begin production of a 45nm, 6-core server processor, code named "Istanbul." The processor will fit into current Socket 1207 platforms.

"It will use existing chipsets, memory systems, same power, same cooling," said Randy Allen, AMD's veep of server and workstation ops at a roadmap briefing today in San Franciso. "It's exactly the same model we've had in terms of being able to take Barcelona and put it into existing platforms. We'll be doing the same thing with Shanghai."

Shanghai, AMD's first 45nm server processor is still on schedule to begin production during the second half of this year. Allen said both Shanghai and Istanbul will utilize AMD's coherent HyperTransport 3.0 technology for inter-processor communication. Additional features include an increased shared Level-3 cache from 2MB to 6MB, and core and instruction-per-clock enhancements.

Two years hence, AMD is gunning to use the third-generation Maranello socket for a new six-core and 12-core server chip lineup.

The 2010-destined six-core "Sao Paolo" processor and 12-core "Magny-Cours" will incorporate DDR3 memory and an additional HyperTransport 3.0 link. Magny-Cours will use two six-core die in a multi-chip package.

Those counting will note a distinct lack of 8-core offerings in AMD's roadmap to match what Intel has been rumbling about.

Allen argued that while the vast majority of server workloads will see good scalability using two-, four-, and six-core chips for servers, the benefit of adding cores past that will dwindle until software workloads run more parallel.

"The more cores you put in there, the slower you're going to have to run it within a fixed power envelope," said Allen." "If you're going to add additional cores, you have to be very convinced that the majority of applications you're running are going to be able to take advantage of those additional cores. If they aren't able to do so, you're actually taking a step backwards."

Allen said AMD's 12-core offering will properly satisfy users with the kind of parallel workload that can use it. ®

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