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XtremeData volunteers to serve as Intel's FPGA busboy

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IDF Co-processor specialist XtremeData has revealed a first quarter ship date for a new FPGA that will tap into the front side bus of Intel's Xeon chips.

XtremeData stands as one of the initial companies to take Intel up on its open FSB offer. Intel first discussed plans to bring partners to the FSB last year. The chipmaker tapped FPGA makers Xilinx and Altera as its partners in this effort to build co-processor accelerators.

XtremeData – which uses FPGAs from Altera – has been selling a co-processor that plugs directly into Opteron sockets for some time. The company, along with fellow start-up DRC, hopes to see software developers move certain high performance computing routines onto its products. The co-processors can provide dramatic speed-ups for some workloads while consuming far less energy than a standard x86 processor.

XtremeData is demonstrating the XD2000i – based on the Altera's Stratix III FPGA - here at the Intel Developer Forum with the product connecting into a 1066MHz FSB while sitting in a Xeon socket.

The companies involved claim that the accelerator can speed up software anywhere between 10X and 100X. "It is the ideal solution for accelerating applications such as mapping the human genome or data analytics for the financial market applications," we're told.

"The XD2000i is pin-compatible with and plugs directly into the processor socket of dual- or quad-socket servers. It was designed to stay within Intel’s defined keep-out area, so customers can now integrate these in-socket accelerators in their Intel Xeon DP rack-mount servers, blade systems and ATCA platforms."

SGI also gave its vote of confidence to the XtremeData product, billing it as an option for Altix XE and ICE systems.

Altera has pledged to support Intel's upcoming QuickPath interconnect technology – a rival to AMD's Hypertransport that will replace the FSB. ®

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Anonymous Coward

Nallatech

No mention of Nallatech in this article? Did they not announce the exact same thing except with Xilinx FPGAs?

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