Intel chief waves wafer full of 'world's first' 32nm chips
One shiny 300mm disc looks much like another...
IDF Intel has proclaimed its 32nm process "on track" for the delivery of processors fabbed using the process in late 2009. As proof, it showed off a 300mm wafer comprising 32nm memory cells - the world's first 32nm chips, it claimed.
Each memory chip die contains 1.9bn transistors - enough for 291Mb of storage capacity - but that's largely irrelevant. The chips will not be used in product, just to verify that functioning 32nm transistors can be made by Intel's fabs.
The 32nm process will be used in 'Westmere', the processor generation that follows 'Nehalem', Intel's next major microarchitecture design. Just as the upcoming 'Penryn' is a the 45nm die-shrink of the 65nm Core 2, so Westmere - formerly 'Nehalem C' - is the 32nm die-shrink of the 45nm Nehalem.
Incidentally, Intel said it expects 45nm production to exceed its output of 65nm processors in Q3 2008, two years after 65nm production surpassed 90nm. Likewise, we can probably expect 32nm to begin superseding 45nm mid- to late-2010.
Intel's Otellini, 2007 (top) and 2003: different shirt, same wafer?
Intel CEO Paul Otellini held up a 300mm wafer full of 32nm chips during his IDF keynote. His colleague, the Digital Enterprise Group's Steve Smith, waved around a 300mm wafer apparently full of 45nm Core 2 Extreme chips. When are these folks going to realise these things appear identical to the rest of us?
Actually, we suspect Intel senior execs are actually having a crafty laugh at the assembled hacks by holding up the same Pentium 4 wafers year after year. How many of their audience could tell the difference?
Never mind the wafer...
Isn't it time he got his spectacles upgraded?
They are TEST SRAM chips. They will NEVER be packaged, they will NEVER be sold! There only purpose in life is to validate the manufacturing process all across the wafer. You get a LOT more information on an SRAM than you ever could on a CPU just due to the different way they work (not to mention transistor density).
Once that wafer has been fabricated and it has gone through sort (and just for the record, the wafers are sorted whole. They are tested again after the go through die prep and assembly, but only the good die get packaged and they don't package stuff that doesn't need to be packed, like validation SRAM!), it is pretty much so much silicon scrap. The only reason they would do anything else with that wafer is if they needed to look as some particular transistors to find out why they didn't work correctly and then it would go to failure analysis for more in-depth investigation.
But monsieur, it's just a waffer!
The two wafers are obviously different, they have different reflective characteristics implying different structure scale size, and the individual 'cells' on each wafer are clearly of a different size.
Call yourselves a tech site... Pah!
It's wrong to say that HP with itanium has no competitors and so customers will buy any shit. SUN with Sparc processors and IBM with Power processors are direct competitors of HP with its Intel itanium processors on the UNIX market. HP Definitely would like and need to have a better processor and is pressing Intel to do so, but Intel seems to have difficulties with its "Itanic" line. For example, the next itanium version, Montvale, was promised to deliver nearly 3GHz performance -- far behind IBM Power6 but a big step forward from Montecito. But the poor Montvale will deliver only feeble improvement: 1.66GHz vs. 1.60GHz today with Montecito.