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Intel CEO dishes discrete graphics return

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IDF Intel CEO Paul Otellini has finally confirmed the company's plan to return to the discrete graphics chip market, although the confirmation did not come easy.

During a keynote at today's Intel Developer Forum here, Otellini gave a detail-thin update on the multi-core Larrabee effort. The CEO did little more than repeat past information such as a 2008 demo target for the Larrabee chip, which will stand as Intel's high-end response to graphics processors from Nvidia and AMD/ATI. Then, the magic occurred.

While discussing the processor, Otellini noted that it will "move us into discrete graphics".

But later, during a press conference, Otellini shied away from uttering the dreaded word 'discrete' when pushed to confirm his keynote slip.

"I said that among the applications for Larrabee one of them is high-end graphics," Otellini said.

Otellini's discrete moment was surely some type of Freudian goof and one that tips rivals to Intel's plans, even though we all knew this was coming. (Update: We have since confirmed that Otellini did, in fact, go off course by revealing Larrabee as a discrete graphics part.)

Intel plans to keep hammering away at integrated graphics for mainstream users but will then offer the high-end Larrabee chip to gaming and high performance computing customers. The chip should have tens of cores and will support "up to 64 threads."

In addition, Larrabee will be based on Intel's instruction set – something the company sees as an advantage over GPUs, since programmers should have an easier time writing multi-threaded software for the part due to their IA (Intel Architecture) familiarity. The product will also have a shared cache, Otellini confirmed.

Intel's recent purchase of Havok should feed both the graphics and HPC plays.

A number of companies are working on similar products to Larrabee. You have the graphics guy hammering away on their flagship parts and then so-called GPGPUs (general purpose GPUs). Then there are companies like Sun with a variety of multi-core chips that could serve accelerator roles. ®

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